EM6520 EM Microelectronic, EM6520 Datasheet - Page 8

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EM6520

Manufacturer Part Number
EM6520
Description
MFP version of EM6620 Ultra Low Power Microcontroller 4x8 LCD Driver
Manufacturer
EM Microelectronic
Datasheet
Figure 6. Reset structure
4
Figure 6 illustrates the reset structure of the EM6520. One can see that there are five possible reset sources :
All reset sources activate the System Reset and the Reset CPU. The ‘System Reset Delay’ ensures that the
system reset remains active long enough for all system functions to be reset (active for N system clock cycles).
The ‘CPU Reset Delay’ ensures that the Reset CPU remains active until the oscillator is in stable oscillation.
As well as activating the system reset and the Reset CPU, the POR also resets all option registers and the sleep
enable (SleepEn) latch. System reset and Reset CPU do not reset the option registers nor the sleep enable
latch.
Copyright  2002, EM Microelectronic-Marin SA
Internal Data Bus
Reset
W rite Active
Read Status
(1) Internal initial reset from the Power On Reset (POR) circuitry.
(2) External reset by simultaneous high/low inputs to port A.
(3) Internal reset from the Digital Watchdog.
(4) Internal reset from the Oscillation Detection Circuit.
(5) Internal reset when SLEEP mode is activated.
W rite Reset
Read Status
(Combinations are defined in the registers OptInpRSel1 and OptInpRSel2
POR
CK[10]
ENABLE
SLEEP
Latch
POR
R
Registers & SLEEP
POR to Option
ENABLE latch
Oscillation
W atchdog
DEBOUNCE
Detection
Digital
CK[1]
ck[8]
SLEEP
Latch
R
Oscillation
W atchdog
detection
Digital
Inhibit
Inhibit
POR
8
System Reset
ck[15]
Delay
--> POR
--> System Reset, Reset CPU
--> System Reset, Reset CPU
--> System Reset, Reset CPU
--> System Reset, Reset CPU
Enable
Activate
CPU Reset
Sleep
Reset from port A Input
NoInpReset
Delay
ck[1]
www.emmicroelectronic.com
EM6520
com bination
03/02 REV. D/449
Reset
CPU

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