MCP4017 Microchip Technology Inc., MCP4017 Datasheet - Page 47

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MCP4017

Manufacturer Part Number
MCP4017
Description
7-bit Single I 2 C? Digital Pot With Volatile Memory In Sc70
Manufacturer
Microchip Technology Inc.
Datasheet

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7.0
In the design of a system with the MCP4017/18/19
devices, the following considerations should be taken
into account. These are:
• The Power Supply
• The Layout
In the design of a system with the MCP4017/18/19
devices, the following considerations should be taken
into account:
7.1
The typical application will require a bypass capacitor
in order to filter high-frequency noise, which can be
induced onto the power supply's traces. The bypass
capacitor helps to minimize the effect of these noise
sources on signal integrity.
appropriate bypass strategy.
In this example, the recommended bypass capacitor
value is 0.1 µF. This capacitor should be placed as
close to the device power pin (V
4 mm).
The power source supplying these devices should be
as clean as possible. If the application circuit has
separate digital and analog power supplies, V
V
FIGURE 7-1:
Connections.
© 2009 Microchip Technology Inc.
SS
Power Supply Considerations
Layout Considerations
should reside on the analog plane.
W
A
B
DESIGN CONSIDERATIONS
Power Supply Considerations
0.1 µF
V
V
DD
SS
Typical Microcontroller
Figure 7-1
DD
0.1 µF
SDA
SCL
) as possible (within
V
V
illustrates an
DD
SS
DD
and
7.2
Inductively-coupled AC transients and digital switching
noise can degrade the input and output signal integrity,
potentially
performance. Careful board layout will minimize these
effects and increase the Signal-to-Noise Ratio (SNR).
Bench testing has shown that a multi-layer board
utilizing a low-inductance ground plane, isolated inputs,
isolated outputs and proper decoupling are critical to
achieving the performance that the silicon is capable of
providing. Particularly harsh environments may require
shielding of critical signals.
If low noise is desired, breadboards and wire-wrapped
boards are not recommended.
7.2.1
Characterization curves of the resistor temperature
coefficient (Tempco) are shown in
Figure
These curves show that the resistor network is
designed to correct for the change in resistance as
temperature increases. This technique reduces the
end to end change is R
2-29,
Layout Considerations
RESISTOR TEMPCO
Figure
MCP4017/18/19
masking
2-47, and
AB
resistance.
the
Figure
MCP4017/18/19’s
DS22147A-page 47
2-65.
Figure
2-11,

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