MCP4728 Microchip Technology Inc., MCP4728 Datasheet - Page 33

• Manufacturer Part Number: MCP4728
• Description: 12-bit, Quad Digital-to-analog Converter With Eeprom Memory
• Manufacturer: Microchip Technology Inc.

5.4.4
This command is used to read the I
the device. If the second byte is “00001100” (0Ch), the
device will output its address bits stored in EEPROM
and register. This command uses the LDAC pin to
FIGURE 5-6:
© 2009 Microchip Technology Inc.
Start
S 0 0 0 0 0 0 0 0 A 0 0 0 0 1 1 0 0 A S 1 1 0 0 X X X 1 A A2 A1 A0 1 A2 A1 A0 0 A P
Clock Pulse
(CLK Line)
Clock and LDAC Transition Details:
LDAC Pin
(General Call Address)
LDAC Pin
2nd Byte
GENERAL CALL READ ADDRESS
BITS
1st Byte
6
Note 1: Clock Pulse and LDAC Transition Details.
Note 2 (a)
7
2:
3: LDAC pin resumes its normal function after “Stop” bit.
General Call Read I
ACK Clock
8
LDAC pin events at the 2nd and 3rd bytes.
a.
b.
c.
9
Keep LDAC pin “High” until the end of the positive pulse of the 8th clock of the
2nd byte.
LDAC pin makes a transition from “High” to “Low” during the negative pulse of
the 8th clock of the 2nd byte (just before the rising edge of the 9th clock) and
stays “Low” until the rising edge of clock 9 of the 3rd byte.
The MCP4728 device does not acknowledge the 3rd byte if the conditions (a)
and (b) are not met.
Note 2(b, c)
2
S
2nd Byte
C address bits of
Restart Clock
Stay “Low” until the end of the 3rd Byte
1
2
C Address.
ACK (MCP4728)
2
3
Note 2(b)
Restart Pulse
4
(Notes 1, 2, 3)
3rd Byte
select the device of
LDAC pin needs a logic transition from “High” to “Low”
during the negative pulse of the 8th clock of the second
byte, and stays “Low” until the end of the 3rd byte. The
maximum clock rate for this command is 400 kHz.
Restart Byte
5
3rd Byte
6
7
8
interest to read on the I
Address Bits
EEPROM
ACK Clock
9
Reading Address Bits
in
4th Byte
Note 3
1
MCP4728
Reading Address Bits
Note 3
Address Bits
4th Byte
Register
2
in Input
DS22187A-page 33
ACK (Master)
3
2
C
bus. The
Stop