ADP3208 ON Semiconductor, ADP3208 Datasheet - Page 23

• Manufacturer Part Number: ADP3208
• Description: 7-bit, Programmable, Dual-phase, Mobile, Cpu, Synchronous Buck Controller
• Manufacturer: ON Semiconductor

OUTPUT CROWBAR
To prevent the CPU and other external components from
damage due to overvoltage, the ADP3208 turns off the DRVH1
and DRVH2 outputs and turns on the DRVL1 and DRVL2
outputs when the output voltage exceeds the OVP threshold
(1.7 V typical).
Turning on the low-side MOSFETs forces the output capacitor
to discharge and the current to reverse due to current build up
in the inductors. If the output overvoltage is due to a drain-
source short of the high-side MOSFET, turning on the low-side
MOSFET results in a crowbar across the input voltage rail. The
crowbar action blows the fuse of the input rail, breaking the
circuit and thus protecting the microprocessor from
destruction.
When the OVP feature is triggered, the ADP3208 is latched off.
The latch-off function can be reset by removing and reapplying
VCC to the ADP3208 or by briefly pulling the EN pin low.
Pulling TTSNS to less than 1 V disables the overvoltage
protection function. In this configuration, VRTT should be tied
to ground.
Figure 35. Single-Phase Waveforms in DCM with 1 A Load Current
Figure 36. Single-Phase CCM/DCM Frequency vs. Load Current
4
2
3
1
400
350
300
250
200
150
100
50
0
0
SWITCH NODE 5V/DIV
LOW-SIDE GATE DRIVE 5V/DIV
OUTPUT VOLTAGE
9V INPUT
2
INDUCTOR CURRENT
20mV/DIV
5A/DIV
4
LOAD CURRENT (A)
19V INPUT
2μs/DIV
6
8
10
12
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14
REVERSE VOLTAGE PROTECTION
Very large reverse current in inductors can cause negative V
voltage, which is harmful to the CPU and other output
components. The ADP3208 provides a reverse voltage
protection (RVP) function without additional system cost. The
V
CSREF pin voltage drops to less than −300 mV, the ADP3208
triggers the RVP function by disabling all PWM outputs and
driving DRVL1 and DRVL2 low, thus turning off all MOSFETs.
The reverse inductor currents can be quickly reset to 0 by
discharging the built-up energy in the inductor into the input
dc voltage source via the forward-biased body diode of the
high-side MOSFETs. The RVP function is terminated when the
CSREF pin voltage returns to greater than −100 mV.
Sometimes the crowbar feature inadvertently causes output
reverse voltage because turning on the low-side MOSFETs
results in a very large reverse inductor current. To prevent
damage to the CPU caused from negative voltage, the ADP3208
maintains its RVP monitoring function even after OVP latch-
off. During OVP latch-off, if the CSREF pin voltage drops to
less than −300 mV, the low-side MOSFETs is turned off. DRVL
outputs are allowed to turn back on when the CSREF voltage
recovers to greater than −100 mV.
OUTPUT ENABLE AND UVLO
For the ADP3208 to begin switching, the VCC supply voltage to
the controller must be greater than the V
EN pin must be driven high. If the VCC voltage is less than the
V
shuts off. In shutdown mode, the controller holds the PWM
outputs low, shorts the capacitors of the SS and PGDELAY pins
to ground, and drives the DRVH and DRVL outputs low.
The user must adhere to proper power-supply sequencing during
startup and shutdown of the ADP3208. All input pins must be
at ground prior to removing or applying VCC, and all output
pins should be left in high impedance state while VCC is off.
THERMAL THROTTLING CONTROL
The ADP3208 includes a thermal monitoring circuit to detect
whether the temperature of the VR has exceeded a user-defined
thermal throttling threshold. The thermal monitoring circuit
requires an external resistor divider connected between the
VCC pin and GND. The divider consists of an NTC thermistor
and a resistor. To generate a voltage that is proportional to
temperature, the midpoint of the divider is connected to the
TTSNS pin. An internal comparator circuit compares the
TTSNS voltage to half the VCC threshold and outputs a logic
level signal at the VRTT output when the temperature trips the
user-set alarm threshold. The VRTT output is designed to drive
an external transistor that in turn provides the high current,
open-drain VRTT signal required by the IMVP-6+ specification.
CORE
CCUVLO
voltage is monitored through the CSREF pin. When the
threshold or the EN pin is a logic low, the ADP3208
CCOK
threshold and the
ADP3208
CORE