LM3S6422 Luminary Micro, Inc, LM3S6422 Datasheet - Page 16

• Manufacturer Part Number: LM3S6422
• Description: Lm3s6422 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Table of Contents
Register 13:
Register 14:
Register 15:
Register 16:
Register 17:
Register 18:
Register 19:
Register 20:
Register 21:
Ethernet Controller ...................................................................................................................... 353
Register 1:
Register 2:
Register 3:
Register 4:
Register 5:
Register 6:
Register 7:
Register 8:
Register 9:
Register 10:
Register 11:
Register 12:
Register 13:
Register 14:
Register 15:
Register 16:
Register 17:
Register 18:
Register 19:
Register 20:
Register 21:
Register 22:
Register 23:
Register 24:
Register 25:
Register 26:
Register 27:
Register 28:
Analog Comparators ................................................................................................................... 397
Register 1:
Register 2:
Register 3:
Register 4:
Register 5:
16
SSI Peripheral Identification 7 (SSIPeriphID7), offset 0xFDC ............................................ 344
SSI Peripheral Identification 0 (SSIPeriphID0), offset 0xFE0 ............................................. 345
SSI Peripheral Identification 1 (SSIPeriphID1), offset 0xFE4 ............................................. 346
SSI Peripheral Identification 2 (SSIPeriphID2), offset 0xFE8 ............................................. 347
SSI Peripheral Identification 3 (SSIPeriphID3), offset 0xFEC ............................................ 348
SSI PrimeCell Identification 0 (SSIPCellID0), offset 0xFF0 ............................................... 349
SSI PrimeCell Identification 1 (SSIPCellID1), offset 0xFF4 ............................................... 350
SSI PrimeCell Identification 2 (SSIPCellID2), offset 0xFF8 ............................................... 351
SSI PrimeCell Identification 3 (SSIPCellID3), offset 0xFFC ............................................... 352
Ethernet MAC Raw Interrupt Status (MACRIS), offset 0x000 ............................................ 362
Ethernet MAC Interrupt Acknowledge (MACIACK), offset 0x000 ....................................... 364
Ethernet MAC Interrupt Mask (MACIM), offset 0x004 ....................................................... 365
Ethernet MAC Receive Control (MACRCTL), offset 0x008 ................................................ 366
Ethernet MAC Transmit Control (MACTCTL), offset 0x00C ............................................... 367
Ethernet MAC Data (MACDATA), offset 0x010 ................................................................. 368
Ethernet MAC Individual Address 0 (MACIA0), offset 0x014 ............................................. 370
Ethernet MAC Individual Address 1 (MACIA1), offset 0x018 ............................................. 371
Ethernet MAC Threshold (MACTHR), offset 0x01C .......................................................... 372
Ethernet MAC Management Control (MACMCTL), offset 0x020 ........................................ 373
Ethernet MAC Management Divider (MACMDV), offset 0x024 .......................................... 374
Ethernet MAC Management Transmit Data (MACMTXD), offset 0x02C ............................. 375
Ethernet MAC Management Receive Data (MACMRXD), offset 0x030 .............................. 376
Ethernet MAC Number of Packets (MACNP), offset 0x034 ............................................... 377
Ethernet MAC Transmission Request (MACTR), offset 0x038 ........................................... 378
Ethernet PHY Management Register 0 – Control (MR0), address 0x00 ............................. 379
Ethernet PHY Management Register 1 – Status (MR1), address 0x01 .............................. 381
Ethernet PHY Management Register 2 – PHY Identifier 1 (MR2), address 0x02 ................. 383
Ethernet PHY Management Register 3 – PHY Identifier 2 (MR3), address 0x03 ................. 384
Ethernet PHY Management Register 4 – Auto-Negotiation Advertisement (MR4), address
0x04 ............................................................................................................................. 385
Ethernet PHY Management Register 5 – Auto-Negotiation Link Partner Base Page Ability
(MR5), address 0x05 ..................................................................................................... 387
Ethernet PHY Management Register 6 – Auto-Negotiation Expansion (MR6), address
0x06 ............................................................................................................................. 388
Ethernet PHY Management Register 16 – Vendor-Specific (MR16), address 0x10 ............. 389
Ethernet PHY Management Register 17 – Interrupt Control/Status (MR17), address
0x11 .............................................................................................................................. 391
Ethernet PHY Management Register 18 – Diagnostic (MR18), address 0x12 ..................... 393
Ethernet PHY Management Register 19 – Transceiver Control (MR19), address 0x13 ....... 394
Ethernet PHY Management Register 23 – LED Configuration (MR23), address 0x17 ......... 395
Ethernet PHY Management Register 24 –MDI/MDIX Control (MR24), address 0x18 .......... 396
Analog Comparator Masked Interrupt Status (ACMIS), offset 0x00 .................................... 402
Analog Comparator Raw Interrupt Status (ACRIS), offset 0x04 ......................................... 403
Analog Comparator Interrupt Enable (ACINTEN), offset 0x08 ........................................... 404
Analog Comparator Reference Voltage Control (ACREFCTL), offset 0x10 ......................... 405
Analog Comparator Status 0 (ACSTAT0), offset 0x20 ....................................................... 406
Preliminary
July 25, 2008