LM3S6918 Luminary Micro, Inc, LM3S6918 Datasheet - Page 412
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LM3S6918
Manufacturer Part Number
LM3S6918
Description
Lm3s6918 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S6918.pdf
(539 pages)
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Reset
Reset
Type
Type
Inter-Integrated Circuit (I
I2C Slave Interrupt Clear (I2CSICR)
I2C Slave 0 base: 0x4002.0800
I2C Slave 1 base: 0x4002.1800
Offset 0x018
Type WO, reset 0x0000.0000
412
Bit/Field
31:1
0
RO
RO
31
15
0
0
Register 16: I
This register clears the raw interrupt. A read of this register returns no meaningful data.
RO
RO
30
14
0
0
reserved
RO
RO
DATAIC
29
13
0
0
Name
2
C) Interface
RO
RO
28
12
0
0
2
C Slave Interrupt Clear (I2CSICR), offset 0x018
RO
RO
27
11
0
0
Type
WO
RO
RO
RO
26
10
0
0
Reset
0x00
RO
RO
25
0
9
0
0
Preliminary
reserved
RO
RO
24
0
8
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Data Interrupt Clear
This bit controls the clearing of the raw interrupt for data received and
data requested. When set, it clears the DATARIS interrupt bit; otherwise,
it has no effect on the DATARIS bit value.
reserved
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
RO
RO
20
0
4
0
RO
RO
19
0
3
0
RO
RO
18
0
2
0
July 26, 2008
RO
RO
17
0
1
0
DATAIC
WO
RO
16
0
0
0
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