LM3S6938 Luminary Micro, Inc, LM3S6938 Datasheet - Page 10

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LM3S6938

Manufacturer Part Number
LM3S6938
Description
Lm3s6938 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet

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Table of Contents
List of Tables
Table 1.
Table 2.
Table 3-1.
Table 4-1.
Table 4-2.
Table 5-1.
Table 5-2.
Table 6-1.
Table 7-1.
Table 8-1.
Table 8-2.
Table 8-3.
Table 9-1.
Table 9-2.
Table 9-3.
Table 10-1.
Table 10-2.
Table 10-3.
Table 11-1.
Table 12-1.
Table 12-2.
Table 12-3.
Table 13-1.
Table 14-1.
Table 15-1.
Table 15-2.
Table 15-3.
Table 16-1.
Table 16-2.
Table 17-1.
Table 17-2.
Table 17-3.
Table 17-4.
Table 17-5.
Table 19-1.
Table 19-2.
Table 19-3.
Table 19-4.
Table 19-5.
Table 19-6.
Table 19-7.
Table 19-8.
Table 20-1.
Table 20-2.
Table 21-1.
Table 21-2.
10
Revision History .............................................................................................................. 18
Documentation Conventions ............................................................................................ 20
Memory Map ................................................................................................................... 42
Exception Types .............................................................................................................. 44
Interrupts ........................................................................................................................ 45
JTAG Port Pins Reset State ............................................................................................. 49
JTAG Instruction Register Commands ............................................................................... 54
System Control Register Map ........................................................................................... 67
Hibernation Module Register Map ................................................................................... 129
Flash Protection Policy Combinations ............................................................................. 143
Flash Resident Registers ............................................................................................... 145
Flash Register Map ........................................................................................................ 146
GPIO Pad Configuration Examples ................................................................................. 170
GPIO Interrupt Configuration Example ............................................................................ 170
GPIO Register Map ....................................................................................................... 172
Available CCP Pins ........................................................................................................ 209
16-Bit Timer With Prescaler Configurations ..................................................................... 212
Timers Register Map ...................................................................................................... 218
Watchdog Timer Register Map ........................................................................................ 245
Samples and FIFO Depth of Sequencers ........................................................................ 268
Differential Sampling Pairs ............................................................................................. 270
ADC Register Map ......................................................................................................... 273
UART Register Map ....................................................................................................... 306
SSI Register Map .......................................................................................................... 351
Examples of I
Inter-Integrated Circuit (I
Write Field Decoding for I2CMCS[3:0] Field (Sheet 1 of 3) ................................................ 395
TX & RX FIFO Organization ........................................................................................... 417
Ethernet Register Map ................................................................................................... 420
Comparator 0 Operating Modes ..................................................................................... 459
Comparator 1 Operating Modes ..................................................................................... 459
Comparator 2 Operating Modes ...................................................................................... 460
Internal Reference Voltage and ACREFCTL Field Values ................................................. 460
Analog Comparators Register Map ................................................................................. 462
Signals by Pin Number ................................................................................................... 472
Signals by Signal Name ................................................................................................. 476
Signals by Function, Except for GPIO ............................................................................. 480
GPIO Pins and Alternate Functions ................................................................................. 483
Signals by Pin Number ................................................................................................... 484
Signals by Signal Name ................................................................................................. 489
Signals by Function, Except for GPIO ............................................................................. 493
GPIO Pins and Alternate Functions ................................................................................. 496
Temperature Characteristics ........................................................................................... 498
Thermal Characteristics ................................................................................................. 498
Maximum Ratings .......................................................................................................... 499
Recommended DC Operating Conditions ........................................................................ 499
2
C Master Timer Period versus Speed Mode ............................................... 381
2
C) Interface Register Map ......................................................... 390
Preliminary
July 25, 2008

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