LM3S6950 Luminary Micro, Inc, LM3S6950 Datasheet - Page 500
LM3S6950
Manufacturer Part Number
LM3S6950
Description
Lm3s6950 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S6950.pdf
(567 pages)
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Signal Tables
500
Pin Name
I2C0SCL
I2C0SDA
ERBIAS
GNDPHY
GNDPHY
GNDPHY
CMOD0
CMOD1
Fault
CCP0
CCP1
CCP2
CCP3
CCP4
CCP5
GNDA
GNDA
IDX0
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
HIB
Pin Number
100
95
34
96
35
25
65
76
41
99
15
21
33
39
45
54
57
63
69
82
87
94
97
42
85
86
51
70
71
6
9
4
Preliminary
Pin Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
I
I
I
I
I
I
Buffer Type
Analog
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
OD
OD
Description
Capture/Compare/PWM 0
Capture/Compare/PWM 1
Capture/Compare/PWM 2
Capture/Compare/PWM 3
Capture/Compare/PWM 1
Capture/Compare/PWM 5
CPU Mode bit 0. Input must be set to logic 0
(grounded); other encodings reserved.
CPU Mode bit 1. Input must be set to logic 0
(grounded); other encodings reserved.
12.4 KOhm resistor (1% precision) used
internally for Ethernet PHY.
PWM Fault
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
The ground reference for the analog circuits
(ADC, Analog Comparators, etc.). These are
separated from GND to minimize the electrical
noise contained on VDD from affecting the
analog functions.
The ground reference for the analog circuits
(ADC, Analog Comparators, etc.). These are
separated from GND to minimize the electrical
noise contained on VDD from affecting the
analog functions.
GND of the Ethernet PHY
GND of the Ethernet PHY
GND of the Ethernet PHY
An output that indicates the processor is in
hibernate mode.
I2C module 0 clock
I2C module 0 data
QEI module 0 index
July 25, 2008
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