LM3S2601 Luminary Micro, Inc, LM3S2601 Datasheet - Page 450

• Manufacturer Part Number: LM3S2601
• Description: Lm3s2601 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Signal Tables
450
Pin Name
I2C0SCL
I2C0SDA
I2C1SCL
I2C1SDA
CMOD0
CMOD1
CCP6
CCP7
GNDA
GNDA
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
HIB
LDO
NC
NC
NC
NC
Pin Number
M12
C12
E11
B10
L10
K10
F10
F12
C11
J10
F11
M6
C9
C8
C4
C5
H3
K5
K6
B6
B5
A5
E3
B1
A1
B3
B2
J3
L6
Preliminary
Pin Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Buffer Type
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
TTL
TTL
TTL
TTL
TTL
OD
OD
OD
OD
-
-
-
-
Description
Capture/Compare/PWM 6
Capture/Compare/PWM 7
CPU Mode bit 0. Input must be set to logic 0
(grounded); other encodings reserved.
CPU Mode bit 1. Input must be set to logic 0
(grounded); other encodings reserved.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
The ground reference for the analog circuits
(ADC, Analog Comparators, etc.). These are
separated from GND to minimize the electrical
noise contained on VDD from affecting the
analog functions.
The ground reference for the analog circuits
(ADC, Analog Comparators, etc.). These are
separated from GND to minimize the electrical
noise contained on VDD from affecting the
analog functions.
An output that indicates the processor is in
hibernate mode.
I2C module 0 clock
I2C module 0 data
I2C module 1 clock
I2C module 1 data
Low drop-out regulator output voltage. This
pin requires an external capacitor between
the pin and GND of 1 µF or greater. The LDO
pin must also be connected to the VDD25 pins
at the board level in addition to the decoupling
capacitor(s).
No connect. Leave the pin electrically
unconnected/isolated.
No connect. Leave the pin electrically
unconnected/isolated.
No connect. Leave the pin electrically
unconnected/isolated.
No connect. Leave the pin electrically
unconnected/isolated.
July 26, 2008