LM3S3768 Luminary Micro, Inc, LM3S3768 Datasheet - Page 622
LM3S3768
Manufacturer Part Number
LM3S3768
Description
Lm3s3768 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S3768.pdf
(755 pages)
- Current page: 622 of 755
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Reset
Reset
Type
Type
Pulse Width Modulator (PWM)
PWM Interrupt Enable (PWMINTEN)
Base 0x4002.8000
Offset 0x014
Type R/W, reset 0x0000.0000
622
Bit/Field
31:20
15:4
19
18
17
16
RO
RO
3
2
1
31
15
0
0
RO
RO
Register 6: PWM Interrupt Enable (PWMINTEN), offset 0x014
This register controls the global interrupt generation capabilities of the PWM module. The events
that can cause an interrupt are the fault input and the individual interrupts from the PWM generators.
30
14
0
0
RO
RO
29
13
IntPWM3
IntPWM2
IntPWM1
reserved
IntFault3
IntFault2
IntFault1
IntFault0
reserved
0
0
Name
RO
RO
28
12
0
0
RO
RO
27
11
0
0
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
RO
26
10
0
0
reserved
reserved
RO
RO
Reset
25
0x00
0x00
0
9
0
0
0
0
0
0
0
0
Preliminary
RO
RO
24
0
8
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Interrupt Fault 3
When set, an interrupt occurs when the fault condition for PWM generator
3 is asserted.
Interrupt Fault 2
When set, an interrupt occurs when the fault condition for PWM generator
2 is asserted.
Interrupt Fault 1
When set, an interrupt occurs when the fault condition for PWM generator
1 is asserted.
Interrupt Fault 0
When set, an interrupt occurs when the FAULT0 input is asserted or the
fault condition for PWM generator 0 is asserted.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
PWM3 Interrupt Enable
When set, an interrupt occurs when the PWM generator 3 block asserts
an interrupt.
PWM2 Interrupt Enable
When set, an interrupt occurs when the PWM generator 2 block asserts
an interrupt.
PWM1 Interrupt Enable
When set, an interrupt occurs when the PWM generator 1 block asserts
an interrupt.
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
RO
RO
20
0
4
0
IntPWM3
IntFault3
R/W
R/W
19
0
3
0
IntPWM2
IntFault2
R/W
R/W
18
0
2
0
IntPWM1
IntFault1
R/W
R/W
17
0
1
0
June 02, 2008
IntPWM0
IntFault0
R/W
R/W
16
0
0
0
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