ST93C67 ST Microelectronics, ST93C67 Datasheet - Page 5

• Manufacturer Part Number: ST93C67
• Description: (ST93C66 / ST93C67) 4K 256 x 16 or 512 x 8 SERIAL MICROWIRE EEPROM
• Manufacturer: ST Microelectronics

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Figure 5. Synchronous Timing, Read or Write
MEMORY ORGANIZATION
The ST93C66 is organized as 512 bytes x 8 bits or
256 words x 16 bits. If the ORG input is left uncon-
nected (or connected to V
is selected, when ORG is connected to Ground
(V
ST93C66 is in standby mode, the ORG input
should be unconnected or set to either V
in order to achieve the minimum power consump-
tion. Any voltage between V
ORG may increase the standby current value.
.com
SS
) the x8 organization is selected. When the
C
S
D
Q
C
S
D
Q
Hi-Z
An
tDVCH
Hi-Z
ADDRESS INPUT
CC
An
SS
) the x16 organization
tDVCH
ADDRESS/DATA INPUT
and V
tCHQL
CC
tCHDX
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applied to
SS
A0
or V
tCHDX
CC
A0/D0
POWER-ON DATA PROTECTION
In order to prevent data corruption and inadvertent
write operations during power up, a Power On
Reset (POR) circuit resets all internal programming
circuitry and sets the device in the Write Disable
mode. When V
device is properly reset (in the Write Disable mode)
and is ready to decode and execute an incoming
instruction. A stable V
applying any logic signal.
tCHQV
tCLSL
Q15/Q7
tSLSH
tSLCH
WRITE CYCLE
tSHQV
DATA OUTPUT
tW
CC
BUSY
reaches its functional value, the
tSLQZ
CC
must be applied, before
READY
tSLQZ
ST93C66, ST93C67
AI01429
Q0
tCLSL
AI00820C
tSLSH
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