ST62T35B ST Microelectronics, ST62T35B Datasheet - Page 47
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ST62T35B
Manufacturer Part Number
ST62T35B
Description
(ST62E35B / ST62T35B) 8-BIT OTP/EPROM MCUs
Manufacturer
ST Microelectronics
Datasheet
1.ST62T35B.pdf
(82 pages)
- Current page: 47 of 82
- Download datasheet (560Kb)
TIMINGS MEASUREMENT MODES(Cont’d)
CP2 triggered restart mode with CP2 event de-
tection.
This mode is enabled for RLDSEL2=1 and
RLDSEL1=0.
As long as RUNRES bit is set, an external event
on CP2 pin generates both, at first the capture into
CP, and then the reload from RLCP. Capture into
CP on CP2 event is enabled only if CP2FLG and
CP2ERR are cleared, otherwise only reload func-
tions from RLCP are performed.
An external event on CP1 activates CP1FLG or
CP1ERR flags without any impact on the reload or
capture functions.
Figure 27. . CP2 Triggered Restart Mode with CP2 Event Detection
Figure 28. . Software Triggered Restart Mode with CP2 Event Detection
COUNTER
RUNRES
CP2
CP2
CP1
CP1
CT
Then Reload CT from RLCP
First Capture CT into CP
CP2 disabled
Set CP2FLG
Load Counter from RLCP and Startup
CP1 disabled
0000h
Set CP1FLG
Set CP1FLG
Set CP1ERR
Reload CT from RLCP
Capture CT into CP
Set CP2ERR
Set CP2FLG
Note: After Reset, the first CP2 event will capture
the 0000h state of the counter into CP and then
will restart the counter after loading it from RLCP.
CP2FLG flag must always be cleared to execute
another capture into CP.
Software triggered restart mode with CP2
event detection.
This mode is enabled for RLDSEL2=0 and
RLDSEL1=0.
RUNRES bit setting initiates the reload and start-
up of the downcounting, while CP2 is used as
strobe source for the CT capture into CP register.
Set CP1ERR
Reload CT from RLCP
Set CP2ERR
Software Reset
No action
ST62T35B/E35B
CP1 disabled
VR02007C
VR02007D
0000h
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