CY7C429-10AXC Cypress Semiconductor Corp, CY7C429-10AXC Datasheet - Page 12
![IC ASYNC FIFO MEM 2KX9 32-TQFP](/photos/6/51/65111/428-32-tqfp_sml.jpg)
CY7C429-10AXC
Manufacturer Part Number
CY7C429-10AXC
Description
IC ASYNC FIFO MEM 2KX9 32-TQFP
Manufacturer
Cypress Semiconductor Corp
Series
CY7Cr
Specifications of CY7C429-10AXC
Function
Asynchronous
Memory Size
18K (2K x 9)
Data Rate
50MHz
Access Time
10ns
Voltage - Supply
3.3V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-TQFP
Configuration
Dual
Density
18Kb
Access Time (max)
10ns
Word Size
9b
Organization
2Kx9
Sync/async
Asynchronous
Expandable
Yes
Bus Direction
Uni-Directional
Clock Freq (max)
Not RequiredMHz
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
32
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CY7C429-10AXC
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Company:
Part Number:
CY7C429-10AXCT
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
into the FIFO, with a signal that is asynchronous to the read
signal. The (internal) state machine in the FIFO goes from empty
to empty+1. However, it does this asynchronously with respect
to the read signal, so that the effective pulse width of the read
signal cannot be determined, because the state machine does
not look at the read signal until it goes to the empty+1 state.
Document #: 38-06001 Rev. *C
FULL
W
D
MR
9
Figure 13. Depth Expansion
9
9
9
FF
FF
FF
CY7C420/1
CY7C424/5
CY7C428/9
CY7C432/3
CY7C420/1
CY7C424/5
CY7C428/9
CY7C432/3
CY7C420/1
CY7C424/5
CY7C428/9
CY7C432/3
CY7C419
CY7C419
CY7C419
XO
XO
XO
XI
XI
XI
Similarly, the minimum write pulse width may be violated by
trying to write into a full FIFO, and asynchronously performing a
read. The empty and full flags are used to avoid these effective
pulse width violations, but to do this and operate at the maximum
frequency, the flag must be valid at the beginning of the next
cycle.
*
* FIRST DEVICE
EF
EF
EF
FL
FL
FL
CY7C419/21/25/29/33
9
Page 12 of 17
Q
EMPTY
R
V
CC
[+] Feedback