NJU6624 New Japan Radio Co., Ltd., NJU6624 Datasheet - Page 17

• Manufacturer Part Number: NJU6624
• Description: 12-character 1-line Dot Matrix LCD Controller Driver with Smooth Scroll Function
• Manufacturer: New Japan Radio Co., Ltd.

(e)Display ON/OFF Control
(e)Display ON/OFF Control
(f)Address Shift
(f)Address Shift
Display On/Off control instruction which controls the whole display On/Off and the addressed position character
Display On/Off control instruction which controls the whole display On/Off and the addressed position character
blink, is executed when the codes of (D) and (B) are written into DB
blink, is executed when the codes of (D) and (B) are written into DB
The
The Address
Address shift instruction shifts the
(1)Cursor display example
(1)Cursor display example
When the number of dot-shift is not set “0” in (j)Dot shift instruction, the blink operation will be ap-
When the number of dot-shift is not set “0” in (j)Dot shift instruction, the blink operation will be ap-
peared at the irregular position.
peared at the irregular position.
Character Font 5 x 7 dots
Character Font 5 x 7 dots
Code
Code
shift instruction shifts the Address
ARL
D
M
1
0
0
B
0
0
1
1
1
D15 D14 D13 D12 D11 D10 D9
D15 D14 D13 D12 D11 D10 D9
MS1 MS0
MS1 MS0
I c o n d i s p l a y O N .
I c o n d i s p l a y O F F .
Shifts the address position to the left ((AC) is decremented by 1)
Shifts the address position to the right ((AC) is incremented by 1)
Display On.
Display Off.I n this mode, the display data remains in the DD RAM so that it is
retrieved immediately on the display when the D change to 1.
The addressed position character is blinking. Blinking rate is 500ms at
f
The cursor and the blink can be displayed simultaneously.
The character does not blink.
osc
=145kHz.
0
0
0
1
Address to the right or left without writing or reading display data.
0
1
to the right or left without writing or reading display data.
0
0
F u n c t i o n
F u n c t i o n
F u n c t i o n
F u n c t i o n
0
1
(2)Blink display example
(2)Blink display example
D8
D8
0
1
Alternating display
Alternating display
D7
D7
*
*
2 2
(D) and DB
(D) and DB
D6
D6
*
*
D5
D5
*
*
0 0
(B), as shown below.
(B), as shown below.
NJU6624A/B
NJU6624A/B
D4
D4
*
*
D3
D3
*
*
D2
D2
D
*
D1
D1
M
*
ARL
D0
D0
B