AD9520-0 Analog Devices, Inc., AD9520-0 Datasheet - Page 31
![no-image](/images/no-image-200.jpg)
AD9520-0
Manufacturer Part Number
AD9520-0
Description
12 Lvpecl/24 Cmos Output Clock Generator With Integrated 2.8 Ghz Vco
Manufacturer
Analog Devices, Inc.
Datasheet
1.AD9520-0.pdf
(84 pages)
- Current page: 31 of 84
- Download datasheet (2Mb)
OPTIONAL
SCLK/SCL
SDIO/SDA
EEPROM
BYPASS
RESET
REFIN
REFIN
SYNC
CLK
CLK
SDO
SP1
SP0
PD
CS
LF
REF1
REF2
REGULATOR (LDO)
DECODE
SERIAL
PORT
LOW DROPOUT
DIGITAL
LOGIC
INTERFACE
AMP
BUF
SPI
SWITCHOVER
STATUS
REFERENCE
REF_SEL
AD9520
EEPROM
STATUS
INTERFACE
I
2
C
VS
PRESCALER
ZERO DELAY BLOCK
Figure 38. Clock Distribution or External VCO < 1600 MHz (Mode 1)
2, 3, 4, 5, OR 6
DIVIDE BY 1,
1
P, P + 1
GND
0
N DIVIDER
STATUS
COUNTERS
DISTRIBUTION
REFERENCE
A/B
RSET
Rev. 0 | Page 31 of 84
DIVIDE BY
DIVIDE BY
DIVIDE BY
DIVIDE BY
1 TO 32
1 TO 32
1 TO 32
1 TO 32
PROGRAMMABLE
REFMON
N DELAY
FREQUENCY
DETECTOR
DETECT
PHASE
LOCK
CPRSET VCP
CHARGE
PUMP
HOLD
AD9520-0
OUT0
OUT0
OUT1
OUT1
OUT2
OUT2
OUT3
OUT3
OUT4
OUT4
OUT5
OUT5
OUT6
OUT6
OUT7
OUT7
OUT8
OUT8
OUT9
OUT9
OUT10
OUT10
OUT11
OUT11
LD
CP
STATUS
VS_DRV
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