MC14027BCPG ON Semiconductor, MC14027BCPG Datasheet

MC14027BCPG

Manufacturer Part Number

MC14027BCPG

Description

IC FLIP-FLOP JK DUAL CMOS 16DIP

Manufacturer

ON Semiconductor

Series

4000Br

Type

JK Typer

Datasheets

1.MC14027BCPG.pdf (8 pages)

2.MC14027BCPG.pdf (5 pages)

Specifications of MC14027BCPG

Function

Set(Preset) and Reset

Output Type

Differential

Number Of Elements

Number Of Bits Per Element

Frequency - Clock

13MHz

Delay Time - Propagation

50ns

Trigger Type

Positive Edge

Voltage - Supply

3 V ~ 18 V

Operating Temperature

-55°C ~ 125°C

Mounting Type

Through Hole

Package / Case

16-DIP (0.300", 7.62mm)

Circuit Type

Low-Power Schottky

Current, Supply

120 μA

Function Type

2-Channels

Logic Function

Flip-Flop

Logic Type

CMOS

Number Of Circuits

Dual

Package Type

PDIP-16

Special Features

J-K

Temperature, Operating, Range

-55 to +125 °C

Voltage, Supply

3 to 18 VDC

Logic Family

4000

Technology

CMOS

Number Of Bits

Number Of Elements

Clock-edge Trigger Type

Positive-Edge

Polarity

Invert/Non-Invert

Operating Supply Voltage (typ)

3.3/5/9/12/15V

Propagation Delay Time

450ns

Low Level Output Current

4.2mA

High Level Output Current

-4.2mA

Frequency (max)

6.5MHz

Operating Supply Voltage (min)

Operating Supply Voltage (max)

18V

Operating Temp Range

-55C to 125C

Operating Temperature Classification

Military

Mounting

Through Hole

Pin Count

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Current - Output High, Low

Lead Free Status / Rohs Status

RoHS Compliant part Electrostatic Device

Other names

MC14027BCPGOS

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

Company:

Bonase Electronics (HK) Co., Limited

Part Number:

MC14027BCPG

Manufacturer:

TAIYO

Quantity:

400 000

Current page: 1 of 8
Download datasheet (104Kb)

MC14027B

Dual J−K Flip−Flop

Set (S) and Reset (R) inputs for each flip−flop. These devices may be

used in control, register, or toggle functions.

Features

•

Maximum ratings are those values beyond which device damage can occur.

Maximum ratings applied to the device are individual stress limit values (not

normal operating conditions) and are not valid simultaneously. If these limits are

exceeded, device functional operation is not implied, damage may occur and

reliability may be affected.

1. Temperature Derating:

static voltages or electric fields. However, precautions must be taken to avoid

applications of any voltage higher than maximum rated voltages to this

high−impedance circuit. For proper operation, V

to the range V

either V

*For additional information on our Pb−Free strategy and soldering details, please

MAXIMUM RATINGS

August, 2005 − Rev. 6

download the ON Semiconductor Soldering and Mounting Techniques

Reference Manual, SOLDERRM/D.

Symbol

The MC14027B dual J−K flip−flop has independent J, K, Clock (C),

This device contains protection circuitry to guard against damage due to high

Unused inputs must always be tied to an appropriate logic voltage level (e.g.,

Low; Information is Transferred to the Output Only on the

Positive−Going Edge of the Clock Pulse

Schottky TTL Load Over the Rated Temperature Range

Diode Protection on All Inputs

Supply Voltage Range = 3.0 Vdc to 18 Vdc

Logic Swing Independent of Fanout

Logic Edge−Clocked Flip−Flop Design

Logic State is Retained Indefinitely with Clock Level Either High or

Capable of Driving Two Low−Power TTL Loads or One Low−Power

Pin−for−Pin Replacement for CD4027B

Pb−Free Packages are Available*

Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C

, V

, I

stg

out

or V

DC Supply Voltage Range

Input or Output Voltage Range

Input or Output Current

Power Dissipation, per Package

Ambient Temperature Range

Storage Temperature Range

Lead Temperature

(DC or Transient)

(DC or Transient) per Pin

(Note 1)

(8−Second Soldering)

v (V

). Unused outputs must be left open.

Parameter

or V

(Voltages Referenced to V

out

) v V

and V

−0.5 to V

−0.5 to +18.0

−55 to +125

−65 to +150

out

)

Value

± 10

500

260

should be constrained

+ 0.5

Unit

°C

See detailed ordering and shipping information in the package

dimensions section on page 3 of this data sheet.

ORDERING INFORMATION

WL, L

YY, Y

WW, W

http://onsemi.com

CASE 751B

SOEIAJ−16

CASE 648

CASE 966

P SUFFIX

D SUFFIX

F SUFFIX

PDIP−16

SOIC−16

= Assembly Location

= Wafer Lot

= Year

= Work Week

= Pb−Free Indicator

Publication Order Number:

DIAGRAMS

MARKING

MC14027BCP

AWLYYWWG

MC14027B

AWLYWW

MC14027B/D

14027BG

ALYWG

Related parts for MC14027BCPG

MC14027BCPG Summary of contents

Page 1

... Unused inputs must always be tied to an appropriate logic voltage level (e.g., either Unused outputs must be left open *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2005 August, 2005 − Rev Value Unit − ...

Page 2

MC14027B TRUTH TABLE Inputs † ...

Page 3

... ORDERING INFORMATION Device MC14027BCP MC14027BCPG MC14027BD MC14027BDG MC14027BDR2 MC14027BDR2G MC14027BFEL MC14027BFELG †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. MC14027B Package PDIP−16 PDIP−16 (Pb−Free) SOIC−16 SOIC− ...

Page 4

ELECTRICAL CHARACTERISTICS Î Î Î Î Î ...

Page 5

SWITCHING CHARACTERISTICS (Note 5) Î Î Î ...

Page 6

J 50 50 90% 50 PLH PHL 90% Q 50% 10% ...

Page 7

0.25 (0.010) M −A− −T− SEATING PLANE 0.25 (0.010 MC14027B PACKAGE DIMENSIONS PDIP−16 ...

Page 8

... DETAIL P VIEW American Technical Support: 800−282−9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone: 81−3−5773−3850 http://onsemi.com 8 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. ...

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