LTC4214-2 Linear Technology, LTC4214-2 Datasheet - Page 28

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LTC4214-2

Manufacturer Part Number
LTC4214-2
Description
Negative Low Voltage Hot Swap Controllers
Manufacturer
Linear Technology
Datasheet

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APPLICATIO S I FOR ATIO
LTC4214-1/LTC4214-2
Analog Current Limit and Fast Current Limit
In Figure 16a, when SENSE exceeds V
lated by the analog current limit amplifier loop. When
SENSE drops below V
Figure 16b, when a severe fault occurs, SENSE exceeds
V
current amplifier can establish control. If the severe fault
28
FCL
and GATE immediately pulls down until the analog
PWRGD
TIMER
SENSE
DRAIN
GATE
V
OUT
SS
40 A + 8 • I
(16a) Analog Current Limit Fault
U
1
2
ACL
DRN
3
, GATE is allowed to pull up. In
4
U
Figure 16. Current Limit Behavior (All Waveforms are Referenced to V
V
V
V
TMRH
ACL
CB
W
5 A
ACL
, GATE is regu-
U
5 A
causes V
at V
by 8. This extra current is added to the TIMER pull-up
current of 40 A. This accelerated TIMER current of
[40 A+8 • I
delay. Careful selection of C
prevent SOA damage in a low impedance fault condition.
PWRGD
SENSE
TIMER
DRAIN
40 A + 8 • I
GATE
V
DRNCL
OUT
V
SS
V
DRNCL
TMRH
OUT
. I
1
DRN
(16b) Fast Current Limit Fault
DRN
DRN
V
to exceed V
FCL
CB TIMES OUT
] produces a shorter circuit breaker fault
2
flows into the DRAIN pin and is multiplied
V
ACL
V
CB
DRNCL
EE
T
)
, R
, the DRAIN pin is clamped
D
and MOSFET can help
4214 F16
421412f

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