SC1173 Semtech Corporation, SC1173 Datasheet - Page 8
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SC1173
Manufacturer Part Number
SC1173
Description
PROGRAMMABLE SYNCHRONOUS DC/DC CONVERTER WITH LOW DROPOUT REGULATOR CONTROLLER
Manufacturer
Semtech Corporation
Datasheet
1.SC1173.pdf
(12 pages)
October 25, 1999
LAYOUT GUIDELINES
Careful attention to layout requirements are necessary
for successful implementation of the SC1172/3 PWM
controller. High currents switching at 200kHz are pre-
sent in the application and their effect on ground plane
voltage differentials must be understood and mini-
mized.
1). The high power parts of the circuit should be laid out
first. A ground plane should be used, the number and
position of ground plane interruptions should be such
as to not unnecessarily compromise ground plane in-
tegrity. Isolated or semi-isolated areas of the ground
plane may be deliberately introduced to constrain
ground currents to particular areas, for example the in-
put capacitor and bottom FET ground.
2). The loop formed by the Input Capacitor(s) (Cin), the
Top FET (Q1) and the Bottom FET (Q2) must be kept
© 1999 SEMTECH CORP.
5V
Layout diagram for the SC1172/3
10
Cin Lin
+
0.1uF
0.1uF
10
11
12
1
2
3
4
5
6
7
8
9
AGND
NC
NC
LDOS
VCC
OVP
PWRGOOD
CS-
CS+
PGNDH
DH
PGNDL
RB
RA
PROGRAMMABLE SYNCHRONOUS DC/DC
CONVERTER WITH LOW DROPOUT
REGULATOR CONTROLLER
SC1172/3
VO SENSE
Q3
GATE
LDOV
BSTH
BSTL
VID0
VID1
VID2
VID3
VID4
EN
DL
Cout Lin
24
23
22
21
20
19
18
17
16
15
14
13
12V IN
+
as small as possible. This loop contains all the high cur-
rent, fast transition switching. Connections should be as
wide and as short as possible to minimize loop induc-
tance. Minimizing this loop area will a) reduce EMI, b)
lower ground injection currents, resulting in electrically
“cleaner” grounds for the rest of the system and c) mini-
mize source ringing, resulting in more reliable gate
switching signals.
3). The connection between the junction of Q1, Q2 and
the output inductor should be a wide trace or copper
region. It should be as short as practical. Since this
connection has fast voltage transitions, keeping this
connection short will minimize EMI. The connection be-
tween the output inductor and the sense resistor should
be a wide trace or copper area, there are no fast volt-
age or current transitions in this connection and length
is not so important, however adding unnecessary
impedance will reduce efficiency.
652 MITCHELL ROAD NEWBURY PARK CA 91320
Q1
Q2
Vo Lin
For SC1172, RA and RB
are not required. LDOS connects to
Vo Lin
Cin
5V
+
Heavy lines indicate
high current paths.
4uH
1.00k
5mOhm
2.32k
Cout
+
Vout
SC1172/3
8