SC16C554 Philips Semiconductors, SC16C554 Datasheet - Page 26
![no-image](/images/manufacturer_photos/0/5/522/philips_semiconductors_sml.jpg)
SC16C554
Manufacturer Part Number
SC16C554
Description
Quad UART with 16-byte FIFO and infrared (IrDA) encoder/decoder
Manufacturer
Philips Semiconductors
Datasheet
1.SC16C554.pdf
(55 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
SC16C554B
Manufacturer:
PHILIPS
Quantity:
129
Company:
Part Number:
SC16C554BIB64
Manufacturer:
NXP
Quantity:
301
Part Number:
SC16C554BIB64
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Company:
Part Number:
SC16C554BIB64,151
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Part Number:
SC16C554BIB64,157
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Company:
Part Number:
SC16C554BIB80
Manufacturer:
NXP
Quantity:
1 000
Part Number:
SC16C554BIB80
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Company:
Part Number:
SC16C554BIB80,528
Manufacturer:
Maxim
Quantity:
278
Company:
Part Number:
SC16C554BIB80,528
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Company:
Part Number:
SC16C554BIBM
Manufacturer:
NXP
Quantity:
673
Company:
Part Number:
SC16C554BIBM,151
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Part Number:
SC16C554DB
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Part Number:
SC16C554DBIA68
Manufacturer:
PHILIPS/飞利浦
Quantity:
20 000
Company:
Part Number:
SC16C554DBIA68,529
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Philips Semiconductors
9397 750 13132
Product data
Table 10:
Table 11:
Bit
2
1
0
FCR[7]
0
0
1
1
Symbol
FCR[2]
FCR[1]
FCR[0]
FIFO Control Register bits description
RCVR trigger levels
Quad UART with 16-byte FIFO and infrared (IrDA) encoder/decoder
FCR[6]
0
1
0
1
Rev. 05 — 10 May 2004
Description
Transmit operation in mode ‘1’: When the SC16C554/554D is in FIFO
mode (FCR[0] = logic 1; FCR[3] = logic 1), the TXRDY pin will be a
logic 1 when the transmit FIFO is completely full. It will be a logic 0 if one
or more FIFO locations are empty.
Receive operation in mode ‘1’: When the SC16C554/554D is in FIFO
mode (FCR[0] = logic 1; FCR[3] = logic 1) and the trigger level has been
reached, or a Receive Time-Out has occurred, the RXRDY pin will go to
a logic 0. Once activated, it will go to a logic 1 after there are no more
characters in the FIFO.
XMIT FIFO reset.
RCVR FIFO reset.
FIFO enable.
Logic 0 = No FIFO transmit reset (normal default condition).
Logic 1 = Clears the contents of the transmit FIFO and resets the
FIFO counter logic (the transmit shift register is not cleared or
altered). This bit will return to a logic 0 after clearing the FIFO.
Logic 0 = No FIFO receive reset (normal default condition).
Logic 1 = Clears the contents of the receive FIFO and resets the FIFO
counter logic (the receive shift register is not cleared or altered). This
bit will return to a logic 0 after clearing the FIFO.
Logic 0 = Disable the transmit and receive FIFO (normal default
condition).
Logic 1 = Enable the transmit and receive FIFO. This bit must be a
‘1’ when other FCR bits are written to, or they will not be
programmed.
RX FIFO trigger level
1
4
8
14
…continued
SC16C554/554D
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
26 of 55