MX25L3205 Macronix International, MX25L3205 Datasheet - Page 6

• Manufacturer Part Number: MX25L3205
• Description: 32M-BIT [x 1] CMOS SERIAL eLiteFlashTM MEMORY
• Manufacturer: Macronix International

www.DataSheet4U.com
The Serial Data Output (SO) is high impedance, both Serial Data Input (SI) and Serial Clock (SCLK) are don't care during
the HOLD operation. If Chip Select (CS#) signal goes high during HOLD operation, it has the effect on resetting the internal
logic of the device. It is necessary to drive HOLD# signal to high, and then to drive CS# to low for restarting communication
with the device.
The HOLD operation is not recommended to use during parallel mode.
Figure 2. ACCELERATED PROGRAM TIMING DIAGRAM
PROGRAM/ERASE ACCELERATION
To activate the program/erase acceleration function requires ACC pin connecting to 12V voltage (see Figure 2), and then
to be followed by the normal program/erase process. By utilizing the program/erase acceleration operation, the
performances are improved as shown on table of "ERASE AND PROGRAM PERFORMACE".
P/N: PM1169
HOLD FEATURE
HOLD# pin signal goes low to hold any serial communications with the device. The HOLD feature will not stop the operation
of write status register, programming, or erasing in progress.
The operation of HOLD requires Chip Select(CS#) keeping low and starts on falling edge of HOLD# pin signal while Serial
Clock (SCLK) signal is being low (if Serial Clock signal is not being low, HOLD operation will not start until Serial Clock
signal being low). The HOLD condition ends on the rising edge of HOLD# pin signal while Serial Clock(SCLK) signal is
being low( if Serial Clock signal is not being low, HOLD operation will not end until Serial Clock being low), see Figure 1.
Figure 1. Hold Condition Operation
Note: tVHH (VHH Rise and Fall Time) min. 250ns
12V
ACC
HOLD#
SCLK
V
V
IL
HH
or V
IH
t
VHH
(standard use)
Condition
Hold
6
(non-standard use)
Condition
Hold
MX25L3205
t
VHH
V
IL
or V
REV. 1.0, JUL. 15, 2005
IH