MX29L3211 Macronix International, MX29L3211 Datasheet - Page 14

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MX29L3211

Manufacturer Part Number
MX29L3211
Description
CMOS SINGLE VOLTAGE PAGEMODE FLASH EEPROM
Manufacturer
Macronix International
Datasheet

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MX29L3211
LOW VCC WRITE INHIBIT
To avoid initiation of a write cycle during VCC power-up
and power-down, a write cycle is locked out for VCC less
than VLKO(typically 1.8V). If VCC < VLKO, the command
register is disabled and all internal program/erase circuits
are disabled. Under this condition the device will reset
to the read mode. Subsequent writes will be ignored until
the VCC level is greater than VLKO. It is the user's
www.DataSheet4U.com
responsibility to ensure that the control pins are logically
correct to prevent unintentional write when VCC is
above VLKO.
WRITE PULSE "GLITCH" PROTECTION
Noise pulses of less than 10ns (typical) on CE or WE will
not initiate a write cycle.
LOGICAL INHIBIT
Writing is inhibited by holding any one of OE = VIL,CE =
VIH or WE = VIH. To initiate a write cycle CE and WE
must be a logical zero while OE is a logical one.
P/N:PM0641
REV. 0.3, NOV. 06, 2001
14

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