MX29LA129ML Macronix International, MX29LA129ML Datasheet - Page 30
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MX29LA129ML
Manufacturer Part Number
MX29LA129ML
Description
128M-BIT SINGLE VOLTAGE 3V ONLY UNIFORM SECTOR FLASH MEMORY
Manufacturer
Macronix International
Datasheet
1.MX29LA129ML.pdf
(71 pages)
www.DataSheet4U.com
Q7: Data# Polling
The Data# Polling bit, Q7, indicates to the host system
whether an Automatic Algorithm is in progress or com-
pleted, or whether the device is in Erase Suspend. Data#
Polling is valid after the rising edge of the final WE# pulse
in the program or erase command sequence.
During the Automatic Program algorithm, the device out-
puts on Q7 the complement of the datum programmed
to Q7. This Q7 status also applies to programming dur-
ing Erase Suspend. When the Automatic Program algo-
rithm is complete, the device outputs the datum pro-
grammed to Q7. The system must provide the program
address to read valid status information on Q7. If a pro-
gram address falls within a protected sector, Data# Poll-
ing on Q7 is active for approximately 1 us, then the de-
vice returns to reading array data.
During the Automatic Erase algorithm, Data# Polling pro-
duces a "0" on Q7. When the Automatic Erase algorithm
is complete, or if the device enters the Erase Suspend
mode, Data# Polling produces a "1" on Q7. This is analo-
gous to the complement/true datum output described for
the Automatic Program algorithm: the erase function
changes all the bits in a sector to "1" prior to this, the
device outputs the "complement," or "0". The system must
provide an address within any of the sectors selected for
erasure to read valid status information on Q7.
After an erase command sequence is written, if all sec-
tors selected for erasing are protected, Data# Polling on
Q7 is active for approximately 100 us, then the device
returns to reading array data. If not all selected sectors
are protected, the Automatic Erase algorithm erases the
unprotected sectors, and ignores the selected sectors
that are protected.
When the system detects Q7 has changed from the
complement to true data, it can read valid data at Q7-Q0
on the following read cycles. This is because Q7 may
change asynchronously with Q0-Q6 while Output Enable
(OE#) is asserted low.
Q6:Toggle BIT I
Toggle Bit I on Q6 indicates whether an Automatic Pro-
gram or Erase algorithm is in progress or complete, or
whether the device has entered the Erase Suspend mode.
Toggle Bit I may be read at any address, and is valid
after the rising edge of the final WE# or CEx, whichever
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MX29LA129M H/L
happens first pulse in the command sequence (prior to
the program or erase operation), and during the sector
time-out.
During an Automatic Program or Erase algorithm opera-
tion, successive read cycles to any address cause Q6
to toggle. The system may use either OE# or CEx to
control the read cycles. When the operation is complete,
Q6 stops toggling.
After an erase command sequence is written, if all sec-
tors selected for erasing are protected, Q6 toggles for
100us and returns to reading array data. If not all se-
lected sectors are protected, the Automatic Erase algo-
rithm erases the unprotected sectors, and ignores the
selected sectors that are protected.
The system can use Q6 and Q2 together to determine
whether a sector is actively erasing or is erase suspended.
When the device is actively erasing (that is, the Auto-
matic Erase algorithm is in progress), Q6 toggling. When
the device enters the Erase Suspend mode, Q6 stops
toggling. However, the system must also use Q2 to de-
termine which sectors are erasing or erase-suspended.
Alternatively, the system can use Q7.
If a program address falls within a protected sector, Q6
toggles for approximately 2us after the program com-
mand sequence is written, then returns to reading array
data.
Q6 also toggles during the erase-suspend-program mode,
and stops toggling once the Automatic Program algo-
rithm is complete.
Table 5 shows the outputs for Toggle Bit I on Q6.
Q2:Toggle Bit II
The "Toggle Bit II" on Q2, when used with Q6, indicates
whether a particular sector is actively erasing (that is,
the Automatic Erase algorithm is in process), or whether
that sector is erase-suspended. Toggle Bit II is valid
after the rising edge of the final WE# or CEx, whichever
happens first pulse in the command sequence.
Q2 toggles when the system reads at addresses within
those sectors that have been selected for erasure. (The
system may use either OE# or CEx to control the read
cycles.) But Q2 cannot distinguish whether the sector
is actively erasing or is erase-suspended. Q6, by com-
REV. 1.0, FEB. 27, 2006