sc9821c Silan, sc9821c Datasheet - Page 15

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sc9821c

Manufacturer Part Number
sc9821c
Description
Cd Electronic Shockproof Controller
Manufacturer
Silan
Datasheet
(Continued)
4.
HANGZHOU SILAN MICROELECTRONICS CO.,LTD
Http:
CompareDataBaseAd
dressHigh [7:0]
CompareDataBaseAd
dressLow [7:0]
G722StatusBaseAddr
essHigh [7:0]
G722StatusBaseAddr
essLow [7:0]
4.1 Enter Esp mode
4.2 Configure external Sdram
4.3 Configure audio input and output interface.
4.4 Configure compress mode, shake detecting mode, and shake signal shield time.
Program Guide
² First send short command 0x04, then enter Esp mode.
² HOST need to initialize Sdram. Send the command 0x51 0x52 0x52 0x53 0x54 0x50 0x58 to register
² Host initialized Dram. Send the command 0x47 to register MmuHostCmd(8’ h00)
² HOST need to configure the address of comparative data and decoding information. Send the command
² HOST need to configure the size of Sdram. Now it can only support page as unit,
² HOST need to configure audio input interface. The input and output are 24 Bitclk of IIS interface. Send
² HOST need to configure the compress mode. There are 4 compress modes to be selected (16: 4
² HOST need to configure the shake detecting mode. There are 4 modes to be detected(rising edge of sub
² HOST can configure shake signal shield time. Because Cd servo only receives some very short level
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Symbol
MmuHostCmd(8’ h00) in turn.
0x0f to register CompareDataBaseAddressHigh(8’ h02) , send the command 0xf4 to register
CompareDataBaseAddressLow (8’ h03), send the command 0x0f to register
G722StatusBaseAddressHigh(8’ h04) and send the command 0xf8 to register
G722StatusBaseAddressLow (8’ h05).
BitPoolPageLimitHigh(8’ h58) BitPoolPageLimitLow(8’ h59) .
the command 0x0f to register BitStreamType (8’ h76).
compress, 16:5 compress, 16:6 compress and non-compress), which will send the command to register
MSC85H(8’ h52).
block sync signal, shake signal low level determinant; falling edge of sub block sync signal, shake signal
high level determinant; shake signal low level determinant; shake signal high level determinant), Send
the command to register MSC85H(8’ h52).
jam signal, but not the signal we need, we can solve this problem by setting the shake signal shield time.
Address
0x02
0x03
0x04
0x05
RW
RW
RW
RW
R/W
Initialization
XX
XX
XX
XX
Store the page base address (Bit15 Bit8) of
compare & connect data.
Store the page base address (Bit7
compare & connect data.
Store the page base address (Bit15 Bit8) of
G722 status data.
Store the page base address (Bit7
G722 status data.
Description
REV:1.0
SC9821C
Page 15 of 18
2006.07.21
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