si8630 Silicon Laboratories, si8630 Datasheet - Page 23

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si8630

Manufacturer Part Number
si8630
Description
Low-power Triple-channel Digital Isolator
Manufacturer
Silicon Laboratories
Datasheet

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3.3. Layout Recommendations
To ensure safety in the end user application, high
voltage circuits (i.e., circuits with >30 V
physically separated from the safety extra-low voltage
circuits (SELV is a circuit with <30 V
distance (creepage/clearance). If a component, such as
a digital isolator, straddles this isolation barrier, it must
meet those creepage/clearance requirements and also
provide a sufficiently large high-voltage breakdown
protection rating (commonly referred to as working
voltage protection). Table 5 on page 13 and Table 6 on
page 14
creepage/clearance capabilities of the Si86xx. These
tables also detail the component standards (UL1577,
IEC60747, CSA 5A), which are readily accepted by
certification bodies to provide proof for end-system
specifications requirements. Refer to the end-system
specification
requirements before starting any design that uses a
digital isolator.
3.3.1. Supply Bypass
The Si863x family requires a 0.1 µF bypass capacitor
between V
capacitor should be placed as close as possible to the
package. To enhance the robustness of a design, it is
further recommended that the user also add 1 µF
The typical performance characteristics depicted in the following diagrams are for information purposes only. Refer
to Tables 2, 3, and 4 for actual specification limits.
DD1
detail
(61010-1,
and GND1 and V
the
60950-1,
working
DD2
AC
and GND2. The
60601-1,
voltage
) by a certain
AC
) must be
etc.)
and
Rev. 1.1
bypass capacitors and include 100  resistors in series
with the inputs and outputs if the system is excessively
noisy.
3.3.2. Pin Connections
For narrow-body devices, Pin 2 and Pin 8 GND must be
externally connected to respective ground. Pin 9 and
Pin 15 must also be connected to external ground. No
connect pins are not internally connected. They can be
left floating, tied to VDD, or tied to GND.
3.3.3. Output Pin Termination
The nominal output impedance of an isolator driver
channel is approximately 50 , ±40%, which is a
combination of the value of the on-chip series
termination resistor and channel resistance of the
output
transmission line effects will be a factor, output pins
should be appropriately terminated with controlled
impedance PCB traces.
3.4. Fail-Safe Operating Mode
Si86xx devices feature a selectable (by ordering option)
mode whereby the default output state (when the input
supply is unpowered) can either be a logic high or logic
low when the output supply is powered. See Table 12
on page 20 and "5. Ordering Guide" on page 26 for
more information.
driver
FET.
When
Si8630/31/35
driving
loads
where
23

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