st2024c Sitronix Technology Corporation, st2024c Datasheet - Page 24
st2024c
Manufacturer Part Number
st2024c
Description
24k 8-bit Single Chip Microcontroller
Manufacturer
Sitronix Technology Corporation
Datasheet
1.ST2024C.pdf
(54 pages)
- Current page: 24 of 54
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12.2 PRES
The prescaler PRES is an 8-bits counter as shown in Figure
12-6. Which provides four clock sources for base timer and
timer1, and it is controlled by register PRS. The instruction
read toward PRS will bring out the content of PRES and the
12.3 PREW
The prescaler PREW is an 8-bits counter as shown in Figure
12-6. PREW provides four clock source for base timer and
Ver 2.2
WRITE
Address Name
READ
$023
Bit 7:
Bit 6:
Bit 5:
Bit 7~0: PRS[7~0] : 1’s complement of PRES counter
Write “1” to reset the prescaler (PRS[7~0])
SRES : Prescaler Reset bit
SENA : Prescaler enable bit
SENT : Clock source(TCLK) selection for prescaller PRES
0 = Disable prescaler counting
1 = Enable prescaler counting
0 = Clock source from system clock “SYSCK”
1 = Clock source from external events “INTX”
PRS
R/W
W
R
TABLE 12-21: PRESCALER CONTROL REGISTER (PRS)
PRS[7]
SRES
Bit 7
PRS[6]
SENA
Bit 6
PRS[5]
SENT
Bit 5
24/54
PRS[4]
Bit 4
-
instruction write toward PRS will reset, enable or select clock
sources for PRES.
When user set external interrupt as the input of PRES for
event counter, combining PRES and Timer1 will get a
16bit-event counter.
timer1. It stops counting only if OSCX stops or hardware
reset occurs.
PRS[3]
Bit 3
-
PRS[2]
Bit 2
-
PRS[1]
Bit 1
-
PRS[0]
Bit 0
-
0000 0000
000 - - - - -
ST2024C
Default
1/31/08
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