sl4093b System Logic Semiconductor. co., sl4093b Datasheet

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sl4093b

Manufacturer Part Number
sl4093b
Description
Quad 2-input Nand Schmitt Triggers
Manufacturer
System Logic Semiconductor. co.
Datasheet
SL4093B
Quad 2-Input NAND Schmitt Triggers
High-Voltage Silicon-Gate CMOS
functions as a two-input NAND gate with Schmitt-trigger action on
both inputs. The gate switches at different points for positive- and
negative- going signals. The difference between the positive voltage
(V
(see Fig.1).
P
) and the negative voltage (V
The SL4093B consists of four Schmitt-trigger circuits. Each circuit
Operating Voltage Range: 3.0 to 18 V
Maximum input current of 1 A at 18 V over full package-
temperature range; 100 nA at 18 V and 25 C
Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
LOGIC DIAGRAM
PIN 7 = GND
PIN 14 =V
N
) is defined as hysteresis voltage (V
CC
H
)
T
A
ORDERING INFORMATION
= -55 to 125 C for all packages
FUNCTION TABLE
PIN ASSIGNMENT
A
H
H
L
L
SL4093BN Plastic
SL4093BD SOIC
Inputs
SLS
B
H
H
L
L
System Logic
Semiconductor
Output
H
H
H
Y
L

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sl4093b Summary of contents

Page 1

... SL4093B Quad 2-Input NAND Schmitt Triggers High-Voltage Silicon-Gate CMOS The SL4093B consists of four Schmitt-trigger circuits. Each circuit functions as a two-input NAND gate with Schmitt-trigger action on both inputs. The gate switches at different points for positive- and negative- going signals. The difference between the positive voltage ...

Page 2

... OUT CC Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V Unused outputs must be left open. System Logic SLS Semiconductor SOIC Package+ Parameter and V IN OUT SL4093B Value Unit -0.5 to + 750 ...

Page 3

... SL4093B DC ELECTRICAL CHARACTERISTICS Symbol Parameter V +min Minimum Positive- T Going Input Threshold Voltage V +max Maximum Positive- T Going Input Threshold Voltage V -min Minimum Negative- T Going Input Threshold Voltage V -max Maximum Negative- T Going Input Threshold Voltage V min Minimum Hysteresis H Note Voltage V max Maximum Hysteresis ...

Page 4

... =GND max)+(V min =50pF, R =200k , Input -55 C 5.0 380 10 180 15 130 5.0 200 10 100 SL4093B Guaranteed Limit - 125 Unit 120 20 20 600 mA 0.64 0.51 0.36 1.6 1.3 0.9 4.2 3.4 2.4 mA -2.0 -1.6 -1.15 -0.64 -0.51 -0.36 -1.6 -1.3 -0.9 -4.2 -3.4 -2.4 4 ...

Page 5

... SL4093B b) Transfer characteristic gates Figure 1. Hysteresis definition, characteristic, and test setup EXPANDED LOGIC DIAGRAM a) Definition Figure 2. Switching Waveforms (1/4 of the Device) c) Test setup System Logic SLS Semiconductor ...

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