SST36VF1601G Silicon Storage Technology, Inc., SST36VF1601G Datasheet
SST36VF1601G
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SST36VF1601G Summary of contents
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... Sector-Erase Capability – Uniform 2 KWord sectors • Chip-Erase Capability PRODUCT DESCRIPTION The SST36VF1601G and SST36VF1602G are 1M x16 CMOS Concurrent Read/Write Flash Memory man- ufactured with SST proprietary, high performance CMOS SuperFlash memory technology. The split-gate cell design and thick oxide tunneling injector attain better reliability and manufacturability compared with alternate approaches ...
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... Erase and Program times increase with accumulated Erase/Program cycles. To meet high-density, surface-mount requirements, the SST36VF1601G and SST36VF1602G devices are offered in 48-ball TFBGA, 48-lead TSOP , and 56-ball LFBGA packages. See Figures 6, 7, and 8 for pin assignments. Device Operation Memory operation functions are initiated using standard microprocessor write sequences ...
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... Erase-Suspend and Erase- Resume. See Figures 15 and 16 for timing waveforms. Chip-Erase Operation The SST36VF1601G and SST36VF1602G provide a Chip-Erase operation, which erases the entire memory array to the ‘1’ state. This operation is useful when the entire device must be quickly erased. ...
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... Data# Polling is valid after the rising edge of sixth WE# (or CE#) pulse. See Figure 12 for Data# Polling (DQ diagram and Figure 26 for a flowchart. ©2006 Silicon Storage Technology, Inc. SST36VF1601G / SST36VF1602G Toggle Bits (DQ During the internal Program or Erase operation, any con- secutive attempts to read DQ and ‘0’s, i.e., toggling between ‘1’ and ‘0’. When the internal ...
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... Write operation. This prevents inadvert- ent writes during power-up or power-down. Hardware Block Protection The SST36VF1601G and SST36VF1602G provide hard- ware block protection which protects the outermost 8 KWord in the smaller bank. The block is protected when WP# is held low. See Figures and 5 for Block-Pro- tection location ...
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... Data Sheet Product Identification The Product Identification mode identifies the devices as SST36VF1601G or SST36VF1602G and the manufac- turer as SST. For details, see Table 3 for software opera- tion, Figure 17 for the Software ID Entry and Read timing diagram, and Figure 27 for the Software ID Entry com- mand sequence flowchart ...
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... Mbit Concurrent SuperFlash SST36VF1601G / SST36VF1602G Bottom Sector Protection; 32 KWord Blocks; 2 KWord Sectors 8 KWord Sector Protection (4-2 KWord Sectors) Note: The address input range in x16 mode (BYTE#=V FIGURE 2: SST36VF1601G, 1M x16 Concurrent SuperFlash Dual-Bank Memory Organization ©2006 Silicon Storage Technology, Inc. FFFFFH Block 31 F8000H F7FFFH ...
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... Data Sheet Bottom Sector Protection; 64 KByte Blocks; 4 KByte Sectors 16 KByte Sector Protection (4-4 KByte Sectors) Note: The address input range in x8 mode (BYTE#=V FIGURE 3: SST36VF1601G Concurrent SuperFlash Dual-Bank Memory Organization ©2006 Silicon Storage Technology, Inc. 16 Mbit Concurrent SuperFlash SST36VF1601G / SST36VF1602G 1FFFFFH ...
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... Mbit Concurrent SuperFlash SST36VF1601G / SST36VF1602G Top Block Protection; 32 KWord Blocks; 2 KWord Sectors 8 KWord Block Protection ( KWord Sectors) Note: The address input range in x16 mode (BYTE#=V FIGURE 4: SST36VF1602G, 1M x16 Concurrent SuperFlash Dual-Bank Memory Organization ©2006 Silicon Storage Technology, Inc. FFFFFH FE000H ...
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... Top Block Protection; 64 KByte Blocks; 4 KByte Sectors 16 KByte Block Protection ( KByte Sectors) Note: The address input range in x8 mode (BYTE#=V FIGURE 5: SST36VF1602G Concurrent SuperFlash Dual-Bank Memory Organization ©2006 Silicon Storage Technology, Inc. 16 Mbit Concurrent SuperFlash SST36VF1601G / SST36VF1602G 1FFFFFH 1FC000H Block 31 1FBFFFH 1F0000H 1EFFFFH ...
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... Mbit Concurrent SuperFlash SST36VF1601G / SST36VF1602G FIGURE 6: Pin Assignments for 48-ball TFBGA (6mm x 8mm) A15 1 A14 2 A13 3 A12 4 A11 5 A10 A19 WE# 11 RST WP# 14 RY/BY# 15 A18 16 A17 FIGURE 7: Pin Assignments for 48-lead TSOP (12mm x 20mm) © ...
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... Hardware Reset RY/BY# Ready/Busy# WP# Write Protect BYTE# Word/Byte Configuration To select 8-bit or 16-bit mode. V Power Supply DD V Ground Connection ©2006 Silicon Storage Technology, Inc. SST36VF1601G / SST36VF1602G TOP VIEW (balls facing down) 8 A15 NC NC A16 BYTE A11 A12 A13 A14 NC DQ7 DQ15/A -1 ...
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... IH Product Identification Software Mode 1. RST for all described operation modes can but no other value Device ID = SST36VF1601G = 7343H, SST36VF1602G = 7344H ©2006 Silicon Storage Technology, Inc -DQ BYTE OUT OUT ...
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... SIWA = User Security ID Program word/byte address For SST36VF1601G, valid Word-Addresses for User Sec ID are from 00008H to 00087H. For SST36VF1602G, valid Word-Addresses for User Sec ID are from C0008H to C0087H. All 4 cycles of User Security ID Program and Program Lock-out must be completed before going back to Read-Array mode. ...
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... Mbit Concurrent SuperFlash SST36VF1601G / SST36VF1602G TABLE 7: CFI Query Identification String Address Address 2 x16 Mode x8 Mode Data 10H 20H 0051H 11H 22H 0052H 12H 24H 0059H 13H 26H 0002H 14H 28H 0000H 15H 2AH 0000H 16H 2CH 0000H 17H 2EH 0000H 18H ...
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... In x8 mode, only the lower byte of data is output. ©2006 Silicon Storage Technology, Inc. SST36VF1601G / SST36VF1602G Description N 21 Device size = 2 Bytes (15H = 21; 2 Flash Device Interface description; 0002H = x8/x16 asynchronous interface Maximum number of bytes in multi-byte write = 2 Number of Erase Sector/Block sizes supported by device Sector Information ( Number of sectors ...
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... Mbit Concurrent SuperFlash SST36VF1601G / SST36VF1602G Absolute Maximum Stress Ratings (Applied conditions greater than those listed under “Absolute Maximum Stress Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these conditions or conditions greater than those defined in the operational sections of this data sheet is not implied. Exposure to absolute maximum stress rating conditions may affect device reliability.) Temperature Under Bias . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55° ...
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... Endurance END 1 T Data Retention Latch Up LTH 1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter. ©2006 Silicon Storage Technology, Inc. SST36VF1601G / SST36VF1602G = 2.7-3.6V DD Limits Freq Min Max 5 MHz 15 1 MHz MHz ...
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... Mbit Concurrent SuperFlash SST36VF1601G / SST36VF1602G AC CHARACTERISTICS TABLE 14: Read Cycle Timing Parameters V Symbol Parameter T Read Cycle Time RC T Chip Enable Access Time CE T Address Access Time AA T Output Enable Access Time CE# Low to Active Output CLZ 1 T OE# Low to Active Output OLZ ...
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... FIGURE 9: Read Cycle Timing Diagram 555 ADDRESSES WE OE# CE# RY/BY# DQ XXAA 15-0 Note: X can FIGURE 10: WE# Controlled Program Cycle Timing Diagram ©2006 Silicon Storage Technology, Inc. SST36VF1601G / SST36VF1602G OLZ T CLZ DATA VALID 2AA 555 ADDR T WPH ...
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... Mbit Concurrent SuperFlash SST36VF1601G / SST36VF1602G 555 2AA ADDRESSES WE# T CPH T AS OE# CE# RY/BY# DQ XXAA 15-0 Note: X can but no other value FIGURE 11: CE# Controlled Program Cycle Timing Diagram ADDRESS A 19-0 CE# OE# WE# RY/BY DATA FIGURE 12: Data# Polling Timing Diagram ©2006 Silicon Storage Technology, Inc. ...
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... Note: This device also supports CE# controlled Block-Erase operation. The WE# and CE# signals are interchangeable as long as minimum timings are met. See Table 15 on page 19. X can VIH, but not other value. FIGURE 14: WE# Controlled Chip-Erase Timing Diagram ©2006 Silicon Storage Technology, Inc. SST36VF1601G / SST36VF1602G ...
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... Mbit Concurrent SuperFlash SST36VF1601G / SST36VF1602G SIX-BYTE CODE FOR CHIP-ERASE ADDRESSES 555 2AA CE# OE WE# RY/BY# DQ 15-0 XXAA XX55 Note: This device also supports CE# controlled Block-Erase operation. The WE# and CE# signals are interchangeable as long as minimum timings are met. See Table 15 on page 19. BAx = Block Address X can VIH, but not other value ...
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... Data Sheet THREE-BYTE SEQUENCE FOR SOFTWARE ID ENTRY ADDRESSES 555 CE# OE WE# DQ XXAA 15-0 Note: Device ID = 7343H for SST36VF1601G, and 7344H for SST36VF1602G X can FIGURE 17: Software ID Entry and Read THREE-BYTE SEQUENCE FOR CFI QUERY ENTRY ADDRESSES 555 CE# OE WE# DQ XXAA ...
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... Mbit Concurrent SuperFlash SST36VF1601G / SST36VF1602G THREE-BYTE SEQUENCE FOR SOFTWARE ID EXIT AND RESET ADDRESSES 555 2AA DQ XXAA 15-0 CE# OE WPH WE# Note: X can but no other value FIGURE 19: Software ID Exit/CFI Exit THREE-BYTE SEQUENCE FOR CFI QUERY ENTRY ADDRESSES 555 CE# OE ...
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... T RP RST# CE#/OE# FIGURE 21: RST# Timing Diagram (When no internal operation is in progress) RY/BY# RST# CE# OE# FIGURE 22: RST# Timing Diagram (During Sector- or Block-Erase operation) ©2006 Silicon Storage Technology, Inc. 16 Mbit Concurrent SuperFlash SST36VF1601G / SST36VF1602G T RHR 1342 F17.0 1342 F18.0 S71342-00-000 ...
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... Mbit Concurrent SuperFlash SST36VF1601G / SST36VF1602G V IHT INPUT V ILT AC test inputs are driven at V (0.9 V IHT for inputs and outputs are V (0 FIGURE 23: AC Input/Output Reference Waveforms FIGURE 24: A Test Load Example ©2006 Silicon Storage Technology, Inc REFERENCE POINTS ) for a logic “1” and V (0 ...
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... Data Sheet FIGURE 25: Program Algorithm ©2006 Silicon Storage Technology, Inc. 16 Mbit Concurrent SuperFlash SST36VF1601G / SST36VF1602G Start Load data: XXAAH Address: 555H Load data: XX55H Address: 2AAH Load data: XXA0H Address: 555H Load Address/Data Wait for end of Program ( Data# Polling bit, or Toggle bit ...
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... Mbit Concurrent SuperFlash SST36VF1601G / SST36VF1602G Internal Timer Program/Erase Initiated Wait SCE Program/Erase Completed FIGURE 26: Wait Options ©2006 Silicon Storage Technology, Inc. Toggle Bit Program/Erase Initiated Read byte/word Read same No byte/word No Does DQ 6 match? Yes Program/Erase Completed 29 Data Sheet ...
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... Load data: XX90H Address: 555H Wait T IDA Read Software ID FIGURE 27: Software Product ID/CFI/Sec ID Entry Command Flowcharts ©2006 Silicon Storage Technology, Inc. 16 Mbit Concurrent SuperFlash SST36VF1601G / SST36VF1602G CFI Query Entry Sec ID Query Entry Command Sequence Command Sequence Load data: XXAAH Address: 555H ...
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... Mbit Concurrent SuperFlash SST36VF1601G / SST36VF1602G Load data: XXAAH Load data: XX55H Address: 2AAH Load data: XXF0H Return to normal FIGURE 28: Software Product ID/CFI/Sec ID Exit Command Flowcharts ©2006 Silicon Storage Technology, Inc. Software ID Exit/CFI Exit/Sec ID Exit Command Sequence Load data: XXF0H Address: 555H ...
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... Load data: XX10H Address: 555H Wait T SCE Chip erased to FFFFH FIGURE 29: Erase Command Sequence ©2006 Silicon Storage Technology, Inc. 16 Mbit Concurrent SuperFlash SST36VF1601G / SST36VF1602G Sector-Erase Command Sequence Load data: XXAAH Address: 555H Load data: XX55H Address: 2AAH Load data: XX80H Address: 555H ...
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... Mbit Concurrent SuperFlash SST36VF1601G / SST36VF1602G PRODUCT ORDERING INFORMATION SST 36 VF 1601G - XXXXX - XXX Valid combinations for SST36VF1601G SST36VF1601G-70-4C-B3KE SST36VF1601G-70-4C-EKE SST36VF1601G-70-4I-B3KE SST36VF1601G-70-4I-EKE Valid combinations for SST36VF1602G SST36VF1602G-70-4C-B3KE SST36VF1602G-70-4C-EKE SST36VF1602G-70-4I-B3KE SST36VF1602G-70-4I-EKE Note: Valid combinations are those products in mass production or will be in mass production. Consult your SST sales representative to confirm availability of valid combinations and to determine availability of new combinations. © ...
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... All linear dimensions are in millimeters. 3. Coplanarity: 0. Ball opening size is 0.38 mm (± 0.05 mm) FIGURE 30: 48-ball Thin-profile, Fine-pitch Ball Grid Array (TFBGA) 6mm x 8mm SST Package Code: B3K ©2006 Silicon Storage Technology, Inc. 16 Mbit Concurrent SuperFlash SST36VF1601G / SST36VF1602G BOTTOM VIEW 4.00 6.00 ± 0.20 0. 1.10 ± 0.10 0.12 0.35 ± ...
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... Mbit Concurrent SuperFlash SST36VF1601G / SST36VF1602G Pin # 1 Identifier 0.70 0.50 Note: 1. Complies with JEDEC publication 95 MO-142 DD dimensions, although some dimensions may be more stringent. 2. All linear dimensions are in millimeters (max/min). 3. Coplanarity: 0 Maximum allowable mold flash is 0. the package ends, and 0.25 mm between leads. FIGURE 31: 48-lead Thin Small Outline Package (TSOP) 12mm x 20mm SST Package Code: EK © ...
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... TABLE 16: Revision History Number 00 • Initial release of data sheet Silicon Storage Technology, Inc. • 1171 Sonora Court • Sunnyvale, CA 94086 • Telephone 408-735-9110 • Fax 408-735-9036 ©2006 Silicon Storage Technology, Inc. 16 Mbit Concurrent SuperFlash SST36VF1601G / SST36VF1602G 5.60 8.00 ± 0.20 0.80 1.30 ± 0.10 0.12 0.35 ± 0.05 Description www.SuperFlash.com or www.sst.com ...