ltc1709eg-trpbf Linear Technology Corporation, ltc1709eg-trpbf Datasheet - Page 11

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ltc1709eg-trpbf

Manufacturer Part Number
ltc1709eg-trpbf
Description
2-phase, 5-bit Adjustable,high Efficiency, Synchronous Step-down Switching Regulator
Manufacturer
Linear Technology Corporation
Datasheet
OPERATIO
Differential Amplifier
This amplifier provides true differential output voltage
sensing. Sensing both V
tion in high current applications and/or applications hav-
ing electrical interconnection losses. The AMPMD pin
allows selection of internal, precision feedback resistors
for high common mode rejection differencing applica-
tions, or direct access to the actual amplifier inputs
without these internal feedback resistors for other applica-
tions. The AMPMD pin is grounded to connect the internal
precision resistors in a unity-gain differencing application,
or tied to the INTV
and make the amplifier inputs directly available. The
amplifier is a unity-gain stable, 2MHz gain-bandwidth,
>120dB open-loop gain design. The amplifier has an
output slew rate of 5V/ s and is capable of driving capaci-
tive loads with an output RMS current typically up to
35mA. The amplifier is not capable of sinking current and
therefore must be resistively loaded to do so.
APPLICATIO S I FOR ATIO
The basic LTC1709 application circuit is shown in Figure 1
on the first page. External component selection begins
with the selection of the inductor(s) based on ripple
current requirements and continues with the R
resistor selection using the calculated peak inductor cur-
rent and/or maximum current limit. Next, the power
MOSFETs and D1 and D2 are selected. The operating
frequency and the inductor are chosen based mainly on
the amount of ripple current. Finally, C
ability to handle the input ripple current (that PolyPhase
operation minimizes) and C
ESR to meet the output ripple voltage and load step
specifications (also minimized with PolyPhase). Current
mode architecture provides inherent current sharing be-
tween output stages. The circuit shown in Figure 1 can be
configured for operation up to an input voltage of 28V
(limited by the external MOSFETs).
R
R
SENSE
SENSE1, 2
Selection For Output Current
are chosen based on the required peak output
U
CC
U
pin to bypass the internal resistors
(Refer to Functional Diagram)
OUT
U
OUT
+
and V
is chosen with low enough
OUT
W
IN
is selected for its
benefits regula-
U
SENSE1, 2
TM
Short-Circuit Detection
The RUN/SS capacitor is used initially to limit the inrush
current from the input power source. Once the controllers
have been given time, as determined by the capacitor on
the RUN/SS pin, to charge up the output capacitors and
provide full-load current, the RUN/SS capacitor is then
used as a short-circuit timeout circuit. If the output voltage
falls to less than 70% of its nominal output voltage the
RUN/SS capacitor begins discharging assuming that the
output is in a severe overcurrent and/or short-circuit
condition. If the condition lasts for a long enough period
as determined by the size of the RUN/SS capacitor, the
controller will be shut down until the RUN/SS pin voltage
is recycled. This built-in latchoff can be overidden by
providing a current >5 A at a compliance of 5V to the
RUN/SS pin. This current shortens the soft-start period
but also prevents net discharge of the RUN/SS capacitor
during a severe overcurrent and/or short-circuit condi-
tion. Foldback current limiting is activated when the output
voltage falls below 70% of its nominal level whether or not
the short-circuit latchoff circuit is enabled.
current. The LTC1709 current comparator has a maxi-
mum threshold of 75mV/R
mode range of SGND to 1.1( INTV
parator threshold sets the peak inductor current, yielding
a maximum average output current I
value less half the peak-to-peak ripple current, I
Allowing a margin for variations in the LTC1709 and
external component values yields:
Operating Frequency
The LTC1709 uses a constant frequency, phase-lockable
architecture with the frequency determined by an internal
capacitor. This capacitor is charged by a fixed current plus
an additional current which is proportional to the voltage
applied to the PLLFLTR pin. Refer to Phase-Locked Loop
and Frequency Synchronization in the Applications Infor-
mation section for additional information.
PolyPhase is a registered trademark of Linear Technology Corporation.
R
SENSE
= 2(50mV/I
MAX
)
SENSE
and an input common
CC
MAX
). The current com-
LTC1709
equal to the peak
11
L
.

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