mcs7820 MosChip, mcs7820 Datasheet - Page 14

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mcs7820

Manufacturer Part Number
mcs7820
Description
Usb-2.0 To Two Serial Ports
Manufacturer
MosChip
Datasheet

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Page 14
MCS7820
USB-2.0 to Two Serial Ports
Line Status Register (LSR):
This register provides the status of the data transfer to CPU.
Register:
Description:
Offset:
Permissions:
Access Condition:
Default Value:
Bit[7]
Error
Data
Bit
0
1
2
3
4
5
6
7
LSR
Line Status Register
5
Read
0x00
Empty
Bit[6]
Transmitter and
Receiver Break
Tx
Received Data
Received Data
Data Available
Framing Error
Description
THR Empty
THR Empty
Parity Error
Data Error
Receiver
Overrun
RHR
RHR
Error
Empty
Bit[5]
THR
Logic 0: RHR is empty
Logic 1: RHR is not empty. Data is available to be read
Logic 0: No overrun error
Logic 1: Data was received when the RHR was full, An
Logic 0: No parity error in normal mode or 9
Logic 1: Data has been received that did not have correct
Logic 0: No framing error
Logic 1: Data has been received with an invalid stop-bit.
Logic 0: No receiver break error
Logic 1: The receiver received a break error
Logic 0: Transmitter FIFO is not empty
Logic 1: Transmitter FIFO is empty
Logic 0: The transmitter is not idle
Logic 1: THR is empty and the transmitter has completed
Logic 0: Either there is no receiver data error in the FIFO
Logic 1: At least one parity error, framing error or break
Bit[4]
Break
Rx
overrun has occurred. The error is fl agged when
the data would normally have been transferred
to the RHR.
data is “0” in 9-bit mode.
parity
the character in the shift register and is in the
idle mode
or it was cleared by an earlier read of LSR
indication is present in the FIFO.
Framing
Bit[3]
Error
Operation
Bit[2]
Parity
Error
Overrun
Bit[1]
Error
th
bit received
Rev.
Bit[0]
Rdy
Rx
1.2

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