ltc3853euj Linear Technology Corporation, ltc3853euj Datasheet - Page 8

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ltc3853euj

Manufacturer Part Number
ltc3853euj
Description
Triple Output, Multiphase Synchronous Step-down Controller
Manufacturer
Linear Technology Corporation
Datasheet

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PIN FUNCTIONS
LTC3853
SENSE1
Comparator Inputs. The (+) inputs to the current compara-
tors are normally connected to DCR sensing networks or
current sensing resistors. SENSE3
to 13.5V, allowing higher V
SENSE1
Sense Comparator Inputs. The (–) inputs to the current
comparators are connected to the outputs. SENSE3
mon modes up to 13.5V, allowing higher V
on channel 3.
V
Inputs. These pins receive the remotely sensed feedback
voltages for each channel from external resistive dividers
across the outputs. Connecting V
resistor enables dual output (2 + 1) mode.
I
olds and Error Amplifi er Compensation Points. Each as-
sociated channels’ current comparator tripping threshold
increases with its I
1) mode, I
SGND (Pin 11): Signal Ground. All small-signal compo-
nents and compensation components should connect
to this ground, which in turn connects to PGND at one
point.
PGOOD3 (Pin 16): Power Good Indicator Output for Phase
3. Open-drain logic out that is pulled to ground when any
channel output exceeds the ±7.5% regulation window, after
the internal 17μs power bad mask timer expires.
8
TH1
FB1
, I
, V
TH2
FB2
+
, SENSE2
, SENSE2
, I
, V
TH1
TH3
FB3
and I
(Pins 10, 13, 15): Current Control Thresh-
(Pins 9, 12, 14): Error Amplifi er Feedback
+
TH
, SENSE3
TH2
, SENSE3
control voltage. In dual output (2 +
need to be shorted externally.
OUT
+
(Pins 3, 5, 7): Current Sense
voltages on channel 3.
FB2
(Pins 4, 6, 8): Current
+
to V
common modes up
IN
through a 200k
OUT
voltages
com-
PGOOD12 (Pin 17): Power Good Indicator Output for
Phases 1 and 2. Open-drain logic out that is pulled to
ground when any channel output exceeds the ±7.5%
regulation window, after the internal 17μs power bad
mask timer expires.
INTV
control circuits are powered from this voltage. Also
provides channel 3 driver power. Decouple this pin to
PGND with a minimum of 4.7μF low ESR tantalum or
ceramic capacitor.
EXTV
Connected to INTV
IC power, bypassing the internal low dropout regulator,
whenever EXTV
on this pin and ensure V
V
PGND with a capacitor (0.1μF to 1μF).
DRV
2. Do not exceed 6V on this pin. This pin must be tied to
INTV
BG1, BG2, BG3 (Pins 30, 28, 21): Bottom Gate Driver
Outputs. These pins drive the gates of the bottom N-channel
MOSFETs between PGND and INTV
SW1, SW2, SW3 (Pins 31, 27, 20): Switch Node Con-
nections to Inductors. Voltage swing at these pins is from
a Schottky diode (external) voltage drop below ground
to V
IN
IN
(Pin 24): Main Input Supply. Decouple this pin to
CC12
CC
CC
CC
.
(Pin 23): External Power Input to an Internal Switch
externally.
(Pin 22): Internal 5V Regulator Output. The
(Pin 29): Driver Voltage Input for Channels 1 and
CC
CC
is higher than 4.7V. Do not exceed 6V
. This switch closes and supplies the
IN
> V
EXTVCC
CC
at all times.
/DRV
CC12
.
3853f

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