ltc3787gn Linear Technology Corporation, ltc3787gn Datasheet - Page 23

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ltc3787gn

Manufacturer Part Number
ltc3787gn
Description
Ltc3787 - Polyphase Synchronous Boost Controller
Manufacturer
Linear Technology Corporation
Datasheet

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applicaTions inForMaTion
Phase-Locked Loop and Frequency Synchronization
The LTC3787 has an internal phase-locked loop (PLL)
comprised of a phase frequency detector, a lowpass filter
and a voltage-controlled oscillator (VCO). This allows the
turn-on of the bottom MOSFET of channel 1 to be locked
to the rising edge of an external clock signal applied to
the PLLIN/MODE pin. The turn-on of channel 2’s bot-
tom MOSFET is thus 180 degrees out-of-phase with the
external clock. The phase detector is an edge-sensitive
digital type that provides zero degrees phase shift between
the external and internal oscillators. This type of phase
detector does not exhibit false lock to harmonics of the
external clock.
If the external clock frequency is greater than the internal
oscillator’s frequency, f
ously from the phase detector output, pulling up the VCO
input. When the external clock frequency is less than f
current is sunk continuously, pulling down the VCO input.
If the external and internal frequencies are the same but
exhibit a phase difference, the current sources turn on for
an amount of time corresponding to the phase difference.
The voltage at the VCO input is adjusted until the phase
and frequency of the internal and external oscillators are
identical. At the stable operating point, the phase detector
output is high impedance and the internal filter capacitor,
C
LP
, holds the voltage at the VCO input.
OSC
, then current is sourced continu-
Figure 7. Relationship Between Oscillator
Frequency and Resistor Value at the FREQ Pin
1000
900
800
700
400
300
200
100
600
500
0
15
25
35 45 55
FREQ PIN RESISTOR (k)
OSC
65 75 85 95 105 115 125
,
Typically, the external clock (on the PLLIN/MODE pin) input
high threshold is 1.6V, while the input low threshold is 1.2V.
Note that the LTC3787 can only be synchronized to an
external clock whose frequency is within range of the
LTC3787’s internal VCO, which is nominally 55kHz to
1MHz. This is guaranteed to be between 75kHz and 850kHz.
Rapid phase locking can be achieved by using the FREQ pin
to set a free-running frequency near the desired synchro-
nization frequency. The VCO’s input voltage is prebiased
at a frequency corresponding to the frequency set by the
FREQ pin. Once prebiased, the PLL only needs to adjust
the frequency slightly to achieve phase lock and synchro-
nization. Although it is not required that the free-running
frequency be near external clock frequency, doing so will
prevent the operating frequency from passing through a
large range of frequencies as the PLL locks.
Table 2 summarizes the different states in which the FREQ
pin can be used.
Table 2.
Any of the Above
FREQ PIN
Resistor
INTV
0V
3787 F07
CC
PLLIN/MODE PIN
External Clock
DC Voltage
DC Voltage
DC Voltage
LTC3787
50kHz to 900kHz
Phase Locked to
External Clock
FREQUENCY
350kHz
535kHz
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3787fa

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