ltc6404-2 Linear Technology Corporation, ltc6404-2 Datasheet - Page 18

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ltc6404-2

Manufacturer Part Number
ltc6404-2
Description
600mhz, Low Noise, Ac Precision Fully Differential Input/output Ampli?er/driver
Manufacturer
Linear Technology Corporation
Datasheet
APPLICATIONS INFORMATION
LTC6404-2
make the apparent voltage offset of the amplifi er appear
worse than specifi ed.
In general, the apparent input referred offset induced by
feedback factor mismatch is given by the equation:
where
Interfacing the LTC6404-2 to A/D Converters
The LTC6404-2’s rail-to-rail output and fast settling time
make the LTC6404-2 ideal for interfacing to low voltage,
single supply, differential input ADCs. The sampling process
of ADCs create a sampling glitch caused by switching in
the sampling capacitor on the ADC front end which mo-
mentarily “shorts” the output of the amplifi er as charge
is transferred between the amplifi er and the sampling
cap. The amplifi er must recover and settle from this load
transient before this acquisition period ends for a valid
representation of the input signal. In general, the LTC6404-2
will settle much more quickly from these periodic load
18
V
OSDIFF(APPARENT)
=
3.3V
R
0.1μF
0.1μF
I2
R
+ R
I2
V
IN
F2
, 1V
1
2
3
4
SHDN
V
V
V
P-P
+
OCM
R
≈ (V
16
V
V
5
I1
SHDN
+
R
100Ω
100Ω
NC
NC
+ R
I1
INCM
F1
15
6
Figure 11. Interfacing the LTC6404-2 to a High Speed 105msps ADC
– V
IN
IN
200Ω
+
200Ω
V
+
OCM
OCM
14
7
) • Δβ
OUT
OUT
+
13
8
OUTF
OUTF
LTC6404-2
V
+
+
V
V
64042 F11
V
V
V
V
+
+
12
11
10
9
impulses than from a 2V input step, but it is a good idea
to either use the fi ltered outputs to drive the ADC (Figure
11 shows an example of this), or to place a discrete R-C
fi lter network between the differential unfi ltered outputs
of the LTC6404-2 and the input of the ADC to help absorb
the charge transfer required during the ADC sampling
process. The capacitance of the fi lter network serves as
a charge reservoir to provide high frequency charging
during the sampling process, while the two resistors of
the fi lter network are used to dampen and attenuate any
charge kickback from the ADC. The selection of the R-C
time constant is trial and error for a given ADC, but the
following guidelines are recommended: Choosing too large
of a resistor in the decoupling network (leaving insuffi cient
settling time) will create a voltage divider between the
dynamic input impedance of the ADC and the decoupling
resistors. Choosing too small of a resistor will possibly
prevent the resistor from properly damping the load tran-
sient caused by the sampling process, prolonging the time
required for settling. 16-bit applications typically require
a minimum of 11 R-C time constants. It is recommended
that the capacitor chosen have a high quality dielectric
(for example, C0G multilayer ceramic).
0.1μF
0.1μF
3.3V
V
2.2μF
CM
AIN
AIN
+
LTC2207
GND
CONTROL
V
DD
D15
D0
1μF
1μF
3.3V
64042f

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