s908gz60cfa Freescale Semiconductor, Inc, s908gz60cfa Datasheet - Page 258

• Manufacturer Part Number: s908gz60cfa
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Serial Peripheral Interface (SPI) Module
SPR1 and SPR0 — SPI Baud Rate Select Bits
16.12.3 SPI Data Register
The SPI data register consists of the read-only receive data register and the write-only transmit data
register. Writing to the SPI data register writes data into the transmit data register. Reading the SPI data
register reads data from the receive data register. The transmit data and receive data registers are
separate registers that can contain different values. See
R7–R0/T7–T0 — Receive/Transmit Data Bits
258
If the MODFEN bit is 1, then the SS pin is not available as a general-purpose I/O. When the SPI is
enabled as a slave, the SS pin is not available as a general-purpose I/O regardless of the value of
MODFEN. See
If the MODFEN bit is 0, the level of the SS pin does not affect the operation of an enabled SPI
configured as a master. For an enabled SPI configured as a slave, having MODFEN low only prevents
the MODF flag from being set. It does not affect any other part of SPI operation. See
Error.
In master mode, these read/write bits select one of four baud rates as shown in
SPR0 have no effect in slave mode. Reset clears SPR1 and SPR0.
Use this formula to calculate the SPI baud rate:
Baud rate =
Address: $0012
Do not use read-modify-write instructions on the SPI data register since the
register read is not the same as the register written.
Reset:
Read:
Write:
16.11.4 SS (Slave Select).
MC68HC908GZ60 • MC68HC908GZ48 • MC68HC908GZ32 Data Sheet, Rev. 6
BUSCLK
Bit 7
R7
BD
T7
Table 16-3. SPI Master Baud Rate Selection
SPR1 and SPR0
Figure 16-16. SPI Data Register (SPDR)
R6
T6
6
00
01
10
11
R5
T5
5
NOTE
Unaffected by reset
R4
T4
4
Baud Rate Divisor (BD)
Figure
R3
T3
3
16-2.
128
32
2
8
R2
T2
2
R1
T1
1
Table
Freescale Semiconductor
16.6.2 Mode Fault
Bit 0
R0
T0
16-3. SPR1 and