ics8536-01 Integrated Device Technology, ics8536-01 Datasheet - Page 12

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ics8536-01

Manufacturer Part Number
ics8536-01
Description
Xtal, Lvcmos, Differential Input Lvpecl Output 1 6 266-mhz Buffer
Manufacturer
Integrated Device Technology
Datasheet
T
The clock layout topology shown below is a typical termination
for LVPECL outputs. The two different layouts mentioned are
recommended only as guidelines.
FOUT and nFOUT are low impedance follower outputs that
generate ECL/LVPECL compatible outputs. Therefore, termi-
nating resistors (DC current path to ground) or current sources
must be used for functionality. These outputs are designed to
IDT
RTT =
ERMINATION FOR
ICS8536-01
LOW SKEW, 1-TO-6, CRYSTAL/LVCMOS/DIFFERENTIAL-TO-3.3V, 2.5V LVPECL FANOUT BUFFER
/ ICS
((V
F
FOUT
IGURE
OH
3.3V, 2.5V LVPECL FANOUT BUFFER
+ V
OL
4A. LVPECL O
) / (V
1
LVPECL O
CC
Z
Z
– 2)) – 2
o
o
= 50
= 50
Z
o
50
UTPUT
UTPUTS
T
RTT
ERMINATION
50
V
CC
FIN
- 2V
12
drive 50
should be used to maximize operating frequency and minimize
signal distortion. Figures 4A and 4B show two different layouts
which are recommended only as guidelines. Other suitable
clock layouts may exist and it would be recommended that the
board designers simulate to guarantee compatibility across all
printed circuit and clock component process variations.
FOUT
F
IGURE
transmission lines. Matched impedance techniques
4B. LVPECL O
Z
Z
o
o
= 50
= 50
ICS8536AG-01 REV. B NOVEMBER 3, 2006
125
84
UTPUT
3.3V
125
84
T
ERMINATION
FIN
PRELIMINARY

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