ics87952i-147 Integrated Device Technology, ics87952i-147 Datasheet - Page 6

• Manufacturer Part Number: ics87952i-147
• Description: Low Skew, 1-to-11 Lvcmos/lvttl Clock Multiplier/zero Delay Buffer
• Manufacturer: Integrated Device Technology

ICS87952I-147 Data Sheet
ICS87952AYI-147 REVISION C AUGUST 4, 2009
P
As in any high speed analog circuitry, the power supply pins are
vulnerable to random noise. To achieve optimum jitter performance,
power supply isolation is required. The ICS87952I-147 provides
separate power supplies to isolate any high switching noise from
the outputs to the internal PLL. V
vidually connected to the power supply plane through vias, and
0.01µF bypass capacitors should be used for each pin. Figure 1
illustrates this for a generic V
quires that an additional10Ω resistor along with a 10µF bypass
capacitor be connected to the V
R
I
LVCMOS C
All control pins have internal pulldowns; additional resistance is
not required but can be added for additional protection. A 1kΩ
resistor can be used.
NPUTS
OWER
ECOMMENDATIONS FOR
:
S
UPPLY
ONTROL
P
F
INS
ILTERING
U
DD
NUSED
T
DDA
pin and also shows that V
DD
ECHNIQUES
, V
pin.
DDA
I
NPUT AND
, and V
A
DDO
PPLICATION
O
should be indi-
UTPUT
DDA
P
INS
re-
LOW SKEW, 1-TO-11 LVCMOS/LVTTL CLOCK MULTIPLIER/ZERO DELAY BUFFER
6
I
O
LVCMOS O
All unused LVCMOS output can be left floating. There should be
no trace attached.
NFORMATION
UTPUTS
:
UTPUTS
F
IGURE
1. P
V
V
DDA
DD
OWER
.01µF
.01µF
S
©2009 Integrated Device Technology, Inc.
UPPLY
3.3V
10Ω
10µF
F
ILTERING