ics950402 Integrated Device Technology, ics950402 Datasheet - Page 8

• Manufacturer Part Number: ics950402
• Description: Amd - K8 System Clock Chip
• Manufacturer: Integrated Device Technology

ICS950402
0700B—04/30/04
I
I
I
I
2
2
2
2
C Table: Output Control Register
C Table: Watchdog Timer Register
C Table: VCO Control Select Bit & WD Timer Control Register
C Table: VCO Frequency Control Register
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 7
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Byte 10
Byte 11
Byte 8
Byte 9
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Pin #
Pin #
Pin #
Pin #
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
WD SF4
WD SF3
WD SF2
WD SF1
WD SF0
M/NEN
M Div6
M Div5
M Div4
M Div3
M Div2
M Div1
M Div0
WDEN
WDRB
N Div8
Name
Name
Name
Name
WD7
WD6
WD5
WD4
WD3
WD2
WD1
WD0
representation of M Div
reference divider value.
X*290ms the watchdog
Writing to these bit will
frequency as Byte0 bit
latch-in or Byte 0 Rom
timer will wait before it
Default is 16 X 290ms
Default at power up =
These bits represent
goes to alarm mode.
WD Alarm Status Bit
(6:0) + 2 is equal to
M/N Programming
Watchdog Enable
configure the safe
=4.64 seconds
N Divider Bit 8
The decimal
Function
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Function
Function
Function
Control
Control
Control
Control
Enable
table.
(5:1)
8
Type
Type
Type
Type
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
R
Disable
Disable
Normal
0
0
0
0
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Enable
Enable
Alarm
1
1
1
1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
PWD
PWD
PWD
PWD
X
X
X
X
X
X
X
X
X
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
1