ics9ums9610 Integrated Device Technology, ics9ums9610 Datasheet - Page 12

• Manufacturer Part Number: ics9ums9610
• Description: Pc Main Clock
• Manufacturer: Integrated Device Technology

IDT
Bit(s)
Bit(s)
Bit(s)
Bit(s)
ICS9UMS9610
PC MAIN CLOCK
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Byte
Byte
Byte
Byte
TM
/ICST
M
Pin #
Pin #
Pin #
Pin #
PC MAIN CLOCK
6
7
4
5
CPU PLL M/N Register
CPU PLL M/N Register
DOT96 PLL M/N Register
DOT96 PLL M/N Register
CPU M Div5
CPU M Div4
CPU M Div3
CPU M Div2
CPU M Div1
CPU M Div0
DOT M Div5
DOT M Div4
DOT M Div3
DOT M Div2
DOT M Div1
DOT M Div0
CPU N Div8
CPU N Div9
CPU N Div7
CPU N Div6
CPU N Div5
CPU N Div4
CPU N Div3
CPU N Div2
CPU N Div1
CPU N Div0
DOT N Div8
DOT N Div9
DOT N Div7
DOT N Div6
DOT N Div5
DOT N Div4
DOT N Div3
DOT N Div2
DOT N Div1
DOT N Div0
Name
Name
Name
Name
N Divider Programming Byte5 bit(7:0) and
N Divider Programming Byte7 bit(7:0) and
M Divider Programming
M Divider Programming
N Divider Prog bit 8
N Divider Prog bit 9
N Divider Prog bit 8
N Divider Prog bit 9
Control Function
Control Function
Control Function
Control Function
Byte5 bit(7:6)
Byte6 bit(7:6)
bit (5:0)
bit (5:0)
12
Type
Type
Type
Type
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
and N Divider in Byte 4 and 5 will
and N Divider in Byte 4 and 5 will
and N Divider in Byte 6 and 7 will
and N Divider in Byte 6 and 7 will
The decimal representation of M
The decimal representation of M
The decimal representation of M
The decimal representation of M
frequency. Default at power up
frequency. Default at power up
frequency. VCO Frequency =
frequency. VCO Frequency =
= latch-in. VCO Frequency =
= latch-in. VCO Frequency =
configure the CPU VCO
configure the CPU VCO
configure the DOT VCO
configure the DOT VCO
14.318 x [NDiv(11:0)] /
14.318 x [NDiv(11:0)] /
14.318 x [NDiv(11:0)] /
14.318 x [NDiv(11:0)] /
0
0
0
0
[MDiv(5:0)]
[MDiv(5:0)]
[MDiv(5:0)]
[MDiv(5:0)]
1
1
1
1
1336—06/01/09
Default
Default
Default
Default
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X