ics558-02 Integrated Device Technology, ics558-02 Datasheet

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ics558-02

Manufacturer Part Number
ics558-02
Description
Lvhstl To Cmos Clock Divider
Manufacturer
Integrated Device Technology
Datasheet
LVHSTL TO CMOS CLOCK DIVIDER
Description
The ICS558-02 accepts a high-speed LVHSTL input and
provides four CMOS low skew outputs from a selectable
internal divider (divide by 3, divide by 4). The four outputs
are split into two banks of two outputs. Each bank has a
separate output enable to tri-state the output buffers.
The ICS558-02 is a member of the ICS Clock Blocks
family of clock generation, synchronization, and distribution
devices.
Block Diagram
IDT™ / ICS™ LVHSTL TO CMOS CLOCK DIVIDER
HCLK
HCLK
SEL
TM
Output Divide
/3 or /4
GND
VDD
4
3
1
Features
16-pin TSSOP package
LVHSTL inputs
Accepts up to 250 MHz input frequency
Four low skew (<250 ps) outputs
Selectable internal divider of 3 or 4
Operating voltage of 3.3 V
OE0
OE1
CLK1
CLK2
CLK3
CLK4
ICS558-02
DATASHEET
ICS558-02
REV D 020504

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ics558-02 Summary of contents

Page 1

... The four outputs are split into two banks of two outputs. Each bank has a separate output enable to tri-state the output buffers. The ICS558- member of the ICS Clock Blocks family of clock generation, synchronization, and distribution devices. ...

Page 2

... Low skew clock output. Power Connect to +3.3 V. Power Connect to +3 LVHSTL CLOCK DIVIDER OE1 OE0 CLK 1, CLK Tri-state 0 1 Clock Tri-state 1 1 Clock ON SEL Output Divide Pin Description ICS558-02 CLK 3, CLK 4 Tri-state Tri-state Clock ON Clock ON REV D 020504 ...

Page 3

... LVHSTL TO CMOS CLOCK DIVIDER Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the ICS558-02. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. ...

Page 4

... VDD/ Symbol Conditions θ Still air JA θ 1 m/s air flow JA θ 3 m/s air flow JA θ LVHSTL CLOCK DIVIDER Min. Typ. Max. Units 0 250 MHz 0.5 1.1 2.0 ns 0.5 1.0 2 250 Min. Typ. Max. Units ° C/W 78 ° C/W 70 ° C/W 68 ° C/W 37 ICS558-02 REV D 020504 ...

Page 5

... C 0.09 0.20 0.0035 D 4.90 5.1 0.193 E 6.40 BASIC 0.252 BASIC E1 4.30 4.50 0.169 e 0.65 Basic 0.0256 Basic L 0.45 0.75 0.018 a 0° 8° 0° aaa -- 0. Package Temperature 16-pin TSSOP 0 to 70° C 16-pin TSSOP 0 to 70° C ICS558-02 Inches Max 0.047 0.006 0.041 0.012 0.008 0.201 0.177 0.030 8° 0.004 c REV D 020504 ...

Page 6

... ICS558-02 LVHSTL TO CMOS CLOCK DIVIDER Innovate with IDT and accelerate your future networks. Contact: www.IDT.com For Sales 800-345-7015 408-284-8200 Fax: 408-284-2775 Corporate Headquarters Integrated Device Technology, Inc. 6024 Silver Creek Valley Road San Jose, CA 95138 United States 800 345 7015 +408 284 8200 (outside U.S.) © ...

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