ics512 Integrated Device Technology, ics512 Datasheet - Page 4

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ics512

Manufacturer Part Number
ics512
Description
Loco? Pll Clock Multiplier
Manufacturer
Integrated Device Technology
Datasheet

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IDT™ / ICS™ LOCO™ PLL CLOCK MULTIPLIER
ICS512
LOCO™ PLL CLOCK MULTIPLIER
External Components
Decoupling Capacitor
As with any high-performance mixed-signal IC, the
ICS512 must be isolated from system power supply
noise to perform optimally.
A decoupling capacitor of 0.01µF must be connected
between VDD and GND. It must be connected close to
the ICS512 to minimize lead inductance. No external
power supply filtering is required for the ICS512.
Series Termination Resistor
A 33Ω terminating resistor can be used next to the CLK
pin. The total on-chip capacitance is approximately 12
pF. A parallel resonant, fundamental mode crystal
should be used.
Absolute Maximum Ratings
Recommended Operation Conditions
Stresses above the ratings listed below can cause permanent damage to the ICS512. These ratings, which
are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the
device at these or any other conditions above those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can
affect product reliability. Electrical parameters are guaranteed only over the recommended operating
temperature range.
Supply Voltage, VDD
All Inputs and Outputs
Ambient Operating Temperature (commercial)
Ambient Operating Temperature (industrial)
Storage Temperature
Soldering Temperature
Parameter
Ambient Operating Temperature (commercial)
Ambient Operating Temperature (industrial)
Power Supply Voltage (measured in respect to GND)
Item
4
Crystal Load Capacitors
The device crystal connections should include pads for
small capacitors from X1 to ground and from X2 to
ground. These capacitors are used to adjust the stray
capacitance of the board to match the nominally
required crystal load capacitance. Because load
capacitance can only be increased in this trimming
process, it is important to keep stray capacitance to a
minimum by using very short PCB traces (and no vias)
between the crystal and device. Crystal capacitors, if
needed, must be connected from each of the pins X1
and X2 to ground.
The value (in pF) of these crystal caps should equal (C
-12 pF)*2. In this equation, C
in pF. Example: For a crystal with a 16 pF load
capacitance, each crystal capacitor would be 8 pF
[(16-12) x 2] = 8.
Min.
+3.0
-40
0
7 V
-0.5 V to VDD+0.5 V
0 to +70°C
-40 to +85°C
-65 to +150°C
260°C
Typ.
L
Rating
= crystal load capacitance
Max.
+5.0
+70
+85
ICS512
CLOCK MULTIPLIER
Units
°C
°C
REV F 070805
V
L

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