ics672-01 Integrated Device Technology, ics672-01 Datasheet - Page 2

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ics672-01

Manufacturer Part Number
ics672-01
Description
Quadraclock?? Quadrature Delay Buffer
Manufacturer
Integrated Device Technology
Datasheet
Pin Assignment
Pin Descriptions
IDT™ / ICS™ QUADRACLOCK QUADRATURE DELAY BUFFER
Number
ICS672-01/02
QUADRACLOCK QUADRATURE DELAY BUFFER
6, 7, 12
11, 13
Pin
10
14
15
16
1
2
3
4
5
8
9
CLK180
CLK270
VDDIO
CLK90
ICLK
GND
GND
S0
CLK180
CLK270
VDDIO
FBCLK
CLK90
Name
CLK0
ICLK
GND
FBIN
VDD
Pin
S0
S1
S2
1
2
3
4
5
6
7
8
Output Clock output (90° delayed from CLK0).
Output Clock output (180° delayed from CLK0).
Output
Output Clock output phase aligned to ICLK.
Output Feedback clock output (0° phase shift from CLK0).
Power
Power
Power
Type
Input
Input
Input
Input
Input
Pin
Clock input.
Supply voltage for input and output clocks. Must not exceed VDD.
Connect to ground.
Select input 0. See table above.
Select input 1. See table above.
Select input 2. See table above.
Connect to 3.3 V or 5.0 V.
Feedback clock input. in normal operation, connect to FBCLK.
Clock output (270° delayed from CLK0).
16
15
14
13
12
11
10
9
VDD
S2
S1
FBIN
FBCLK
CLK0
VDD
GND
2
Output Clock Mode Select Table
S2
0
0
0
0
1
1
1
1
Pin Description
S1
0
0
1
1
0
0
1
1
S0
0
1
0
1
0
1
0
1
Power-down + tri-state
Output Clocks
x0.5
x1
x2
x3
x4
x5
x6
ICS672-01/02
ZERO DELAY BUFFER
REV H 051508

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