ics2595 Holt Integrated Circuits, Inc., ics2595 Datasheet - Page 4

• Manufacturer Part Number: ics2595
• Description: User-programmable Dual High-performance Clock Generator
• Manufacturer: Holt Integrated Circuits, Inc.

ICS2595
LATCHED FS inputs, not the FS inputs themselves, that
are interpreted by the internal logic. Interface logic resides
between the FS input pins and the programming/frequency
select logic. The appropriate "data write" procedure must
be observed. See the section "Digital Interface" in this
supplement for more information.
These rules must be followed:
•
•
•
•
•
The FS0 & FS1 inputs are not used for programming, so it
is possible to use a two-pin interface for programming and
frequency selection (any bank of four VCLK addresses).
The reference frequency source must be operational for
proper execution of the programming sequence. If the on-
chip crystal oscillator is, allow at least 4*
device has valid power before attempting to program it.
Calculate
modulus of the reference divider and
reference frequency in Hz) by the following formulas:
A programming sequence consists of 42 successive
data writes to the device as shown in table 1: no delay
greater than
any two successive writes.
A readback sequence consists of 64 successive data
writes to the device as shown in table 2: no delay
greater than
any two successive writes.
Programming or readback sequences must be preceded
by a "quiet" period of at least 2*
writes to the device unless it was immediately preceded
by another legal programming (or readback) sequence
(nothing else in between)
To change the active VCLK frequency selection, simply
write that data to the device; the last data written to the
part will always become VCLK frequency select after
a delay of approximately 2*
register is cleared at this time also.
T
T
max =
min =
T
max and
T
T
4096* R
max or less than
max or less than
F
F
6* R
ref
ref
T
min in seconds (where R is the
T
T
T
min may occur between
min may occur between
max. The internal shift
T
max with no data
T
max after the
F
ref is the
Data Description
D
( L
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
(
0 0
0 0
1 0
1 0
0 1
0 1
1 1
1 1
0 0
0 0
1 0
1 0
0 1
0 1
1 1
1 1
0 0
0 0
0 0
0 0
0
0
1
1
- 1
. 4
0
1
0
1
0 0
0 1
0 0
0 1
0 0
0 1
0 0
0 1
1 0
1 1
1 0
1 1
1 0
1 1
1 0
1 1
0 0
1 0
0 1
1 1
) 0
) 0
P
V
V
V
V
V
V
M
M
M
M
V
V
V
V
V
V
V
V
V
V
O
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
L
S
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
O
L
- T
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
C
D
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
8
4
2
1
I
d d
d d
d d
d d
d d
d d
T
d d
d d
d d
d d
d d
d d
d d
d d
d d
d d
d d
d d
d d
V
d d
I
e r
e r
e r
e r
e r
e r
I
O
e r
e r
e r
e r
e r
e r
e r
e r
e r
e r
e r
e r
e r
e r
D
s s
s s
s s
s s
s s
s s
N
s s
s s
s s
s s
s s
s s
s s
s s
s s
s s
s s
s s
s s
s s
E
0 1
1 1
2 1
3 1
4 1
5 1
R
0
1
2
3
4
5
6
7
8
9
0
1
2
4