ics342 Integrated Device Technology, ics342 Datasheet - Page 6

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ics342

Manufacturer Part Number
ics342
Description
Field Programmable Dual Output Spread Spectrum Versaclock Synthesizer
Manufacturer
Integrated Device Technology
Datasheet

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AC Electrical Characteristics
Thermal Characteristics
IDT™ / ICS™ FIELD PROGRAMMABLE DUAL OUTPUT SS VERSACLOCK SYNTHESIZER 6
ICS342
FIELD PROGRAMMABLE DUAL OUTPUT SS VERSACLOCK SYNTHESIZER
Unless stated otherwise, VDD = 3.3V ±5%, Ambient Temperature -40 to +85° C
Note 1: Measured with 15 pF load.
Note 2: Duty Cycle is configuration dependent. Most configurations are minimum 45% and maximum 55%.
Note 3: ICS test mode output occurs for first 170 clock cycles on CLK2 for each PLL powered up. PDTS transition
high on select address change.
Input Frequency
Output Frequency
Output Rise Time
Output Fall Time
Duty Cycle
Output Frequency Synthesis Error
Power-up time
One Sigma Clock Period Jitter
Maximum Absolute Jitter
Thermal Resistance Junction to
Ambient
Thermal Resistance Junction to Case
Parameter
Parameter
Symbol
F
t
t
Symbol
OR
OF
t
ja
IN
θ
θ
θ
θ
JA
JA
JA
JC
Fundamental Crystal
Input Clock
20% to 80%, Note 1
80% to 20%, Note 1
Note 2
Configuration Dependent
PLL lock time from
power-up, Note 3
PDTS goes high until
stable CLK output, Spread
Spectrum Off, Note 3
PDTS goes high until
stable CLK output, Spread
Spectrum On, Note 3
Configuration Dependent
Deviation from Mean.
Configuration Dependent
Still air
1 m/s air flow
3 m/s air flow
Conditions
Conditions
Min.
Min. Typ. Max. Units
0.25
40
5
2
EPROM CLOCK SYNTHESIZER
Typ.
150
140
120
40
49-51
+200
TBD
0.2
50
1
1
4
4
ICS342
Max. Units
200
27
50
60
10
2
7
°C/W
°C/W
°C/W
°C/W
MHz
MHz
MHz
ppm
ms
ms
ms
ns
ns
ps
ps
%
REV K 051705

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