is61lf25636a Integrated Silicon Solution, Inc., is61lf25636a Datasheet - Page 10

no-image

is61lf25636a

Manufacturer Part Number
is61lf25636a
Description
256k X 36, 512k X 18 9 Mb Synchronous Flow-through Static Ram
Manufacturer
Integrated Silicon Solution, Inc.
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
is61lf25636a-7.5TQI
Manufacturer:
ISSI, Integrated Silicon Solution Inc
Quantity:
10 000
Part Number:
is61lf25636a-7.5TQI-TR
Manufacturer:
ISSI, Integrated Silicon Solution Inc
Quantity:
10 000
Part Number:
is61lf25636a-7.5TQLI
Manufacturer:
ISSI, Integrated Silicon Solution Inc
Quantity:
10 000
Part Number:
is61lf25636a-7.5TQLI-TR
Manufacturer:
ISSI, Integrated Silicon Solution Inc
Quantity:
10 000
TRUTH TABLE
NOTE:
10
1. X means “Don’t Care.” H means logic HIGH. L means logic LOW.
2. For WRITE, L means one or more byte write enable signals (BWa-d) and BWE are LOW or GW is LOW. WRITE = H for all
3. BWa enables WRITEs to DQa’s and DQPa. BWb enables WRITEs to DQb’s and DQPb. BWc enables WRITEs to DQc’s and
4. All inputs except OE and ZZ must meet setup and hold times around the rising edge (LOW to HIGH) of CLK.
5. Wait states are inserted by suspending burst.
6. For a WRITE operation following a READ operation, OE must be HIGH before the input data setup time and held HIGH during
7. This device contains circuitry that will ensure the outputs will be in High-Z during power-up.
8. ADSP LOW always initiates an internal READ at the L-H edge of CLK. A WRITE is performed by setting one or more byte write
IS61LF25636A
OPERATION
Deselect Cycle, Power-Down
Deselect Cycle, Power-Down
Deselect Cycle, Power-Down
Deselect Cycle, Power-Down
Deselect Cycle, Power-Down
Snooze Mode, Power-Down
Read Cycle, Begin Burst
Read Cycle, Begin Burst
Write Cycle, Begin Burst
Read Cycle, Begin Burst
Read Cycle, Begin Burst
Read Cycle, Continue Burst
Read Cycle, Continue Burst
Read Cycle, Continue Burst
Read Cycle, Continue Burst
Write Cycle, Continue Burst
Write Cycle, Continue Burst
Read Cycle, Suspend Burst
Read Cycle, Suspend Burst
Read Cycle, Suspend Burst
Read Cycle, Suspend Burst
Write Cycle, Suspend Burst
Write Cycle, Suspend Burst
PARTIAL TRUTH TABLE
Function
Read
Read
Write Byte 1
Write All Bytes
Write All Bytes
BWx, BWE, GW HIGH.
DQPc. BWd enables WRITEs to DQd’s and DQPd. DQPa and DQPb are available on the x18 version. DQPa-DQPd are
available on the x36 version.
the input data hold time.
enable signals and BWE LOW or GW LOW for the subsequent L-H edge of CLK. See WRITE timing diagram for clarification.
(1-8)
GW
GW
GW
GW
GW
H
H
H
H
L
IS61LF51218A
ADDRESS CE
External
External
External
External
External
Current
Current
Current
Current
Current
Current
None
None
None
None
None
None
Next
Next
Next
Next
Next
Next
BWE
BWE
BWE
BWE
BWE
H
L
L
L
X
CE
CE
CE
CE
H
X
X
X
H
H
X
H
X
X
H
H
X
H
L
L
L
L
L
L
L
L
L
BWa
BWa
BWa
BWa
BWa
H
X
X
L
L
CE2
CE2
CE2
CE2
CE2
H
H
X
X
X
X
L
L
L
L
L
X
X
X
X
X
X
X
X
X
X
X
X
IS61VF25636A
BWb
BWb
BWb
BWb
BWb
CE2
H
H
X
X
L
X
X
X
X
H
H
H
H
H
X
X
X
X
X
X
X
X
X
X
X
X
L
L
ZZ ADSP
BWc
BWc
BWc
BWc
BWc
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
H
X
X
L
ADSP
ADSP
ADSP
ADSP ADSC
Integrated Silicon Solution, Inc. — 1-800-379-4774
X
H
H
X
H
H
H
H
H
X
X
H
X
H
H
X
X
H
X
L
L
L
L
BWd
BWd
BWd
BWd
BWd
X
H
H
X
L
ADSC
ADSC
ADSC
ADSC ADV
X
X
X
X
X
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
IS61VF51218A
ADV
ADV
ADV
ADV WRITE
H
H
H
H
H
H
X
X
X
X
X
X
X
X
X
X
X
L
L
L
L
L
L
WRITE
WRITE
WRITE OE
WRITE
H
H
H
H
H
H
H
X
X
X
X
X
X
X
X
H
H
H
L
L
L
L
L
OE
OE
OE
OE
X
X
X
X
X
X
H
X
H
H
H
X
X
H
H
X
X
L
L
L
L
L
L
CLK
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
X
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
DQ
10/18/07
Q
Q
Q
Q
Q
D
D
D
D
D
Rev. C
Q

Related parts for is61lf25636a