mpc9850 Integrated Device Technology, mpc9850 Datasheet
mpc9850
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mpc9850 Summary of contents
Page 1
... Ambient temperature range –40°C to +85°C Functional Description The MPC9850 uses either MHz reference frequency to generate 8 LVCMOS output clocks, of which, the frequency is selectable from 16 MHz to 200 MHz. The reference is applied to the input of a PLL and multiplied to 2 GHz. Output dividers, divide this frequency by 10, 12, 15, 16, 18, 20, 24, 30, 40 120 to produce output frequencies of 200, 166, 133, 125, 111, 100 MHz ...
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... Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc Ref 0 1 PLL 2000 MHz Figure 1. MPC9850 Logic Diagram Type Function PLL Reference Clock Input (pull-down) PLL Reference Clock Input (PCLK - pull-down, PCLK - pull-up and pull-down) Bank A Outputs Bank B Outputs Bank C Outputs ...
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... PCLK XTAL Bypass Selects 33 MHz Reference Normal CLK_x[5] Frequency N (lsb) (MHz 126 15. 120 16. 25. 33. 50. 66. 83. 100. 111. 125. 133. 166. 200.00 ( 250 MPC9850 NETCOM MPC9850 3 ...
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... DD t reset_rel Figure 2. MR Operation V 4 defines the release time and the minimum pulse specifications. See DD for actual parameter values. The MPC9850 may be t reset_pulse µF 0.1 µF 15 Ω V DDA 0.1 µ ...
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... Per Output °C/W 54.5 Air flow = 0 °C 85 Typ Max Unit Condition 200 pins pins DDIN 175 mA V DDOA V DDOB 200 pins pins DDIN 100 mA V DDOA V DDOB MPC9850 NETCOM DDA and pins DDA and pins MPC9850 5 ...
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... PP Typ Max Unit Condition V + 0.3 V LVCMOS DD 0.8 V LVCMOS µA ± 200 GND IN DDL – 0 Ω 14 – – 0 Ω 18 – 22 Advanced Clock Drivers Devices Freescale Semiconductor NETCOM (AC) MPC9850 ...
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... AC characteristics are design targets and pending characterization characteristics apply for parallel output termination of 50Ω bypass mode, the MPC9850 divides the input reference clock. 4. The input reference frequency must match the VCO lock range divided by the total feedback divider ratio: f ...
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... MPC9850 Clock Generator for PowerQUICC III Table 12. MPC9850 Pin Diagram (Top View DDOA DDOA DDOA DDOA RSVD RSVD DDA DDA REF_SEL CLK E PCLK PCLK F REF_CLK_SEL REF_33MHz G XTAL_IN XTAL_OUT DDOB DDOB DDOB DDOB Table 13. MPC9850 Pin List ...
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... Y14.5M, 1994. 3. MAXIMUM SOLDER BALL DIAMETER MEASURED PARALLEL TO DATUM A. 4. DATUM A, SEATING PLANE, IS DEFINED BY THE SPHERICAL CROWNS OF THE SOLDER BALLS. 5. PARALLELISM MEASUREMENT SHALL EXCLUDE ANY EFFECT OF MARK ON TOP SURFACE OF PACKAGING. 5 0.35 A 100X SEATING 4 A PLANE 0.12 A DETAIL K ROTATED 90˚ CLOCKWISE MPC9850 NETCOM MPC9850 9 ...
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... MPC92459 MPC9850 PART NUMBERS 900 MHz Low Voltage LVDS Clock Synthesizer Clock Generator for PowerQUICC III INSERT PRODUCT NAME AND DOCUMENT TITLE Innovate with IDT and accelerate your future networks. Contact: www.IDT.com For Sales 800-345-7015 408-284-8200 Fax: 408-284-2775 Corporate Headquarters Integrated Device Technology, Inc. ...