mpc92439 Integrated Device Technology, mpc92439 Datasheet

mpc92439

Manufacturer Part Number

mpc92439

Description

900mhz, Low Voltage, Lvpecl Clock Syntheesizer

Manufacturer

Integrated Device Technology

Datasheet

1.MPC92439.pdf (15 pages)

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

Company:

BOSTOCK HK LIMITED

Part Number:

mpc92439AC

Manufacturer:

IDT, Integrated Device Technology Inc

Quantity:

10 000

Company:

BOSTOCK HK LIMITED

Part Number:

mpc92439ACR2

Manufacturer:

IDT, Integrated Device Technology Inc

Quantity:

10 000

Company:

BOSTOCK HK LIMITED

Part Number:

mpc92439EI

Manufacturer:

IDT, Integrated Device Technology Inc

Quantity:

10 000

Company:

BOSTOCK HK LIMITED

Part Number:

mpc92439EIR2

Manufacturer:

IDT, Integrated Device Technology Inc

Quantity:

10 000

Current page: 1 of 15
Download datasheet (823Kb)

performance clock generation in mid-range to high-performance telecom, networking and

computing applications. With output frequencies from 3.125 MHz to 900 MHz and the

support of differential LVPECL output signals the device meets the needs of the most

demanding clock applications.

Features

•

Functional Description

reference. The frequency of the internal crystal oscillator or external reference clock signal is

multiplied by the PLL. The VCO within the PLL operates over a range of 400 to 900 MHz. Its

output is scaled by a divider that is configured by either the serial or parallel interfaces. The

crystal oscillator frequency f

termine the output frequency.

be M times the reference frequency by adjusting the VCO control voltage. Note that for

some values of M (either too high or too low) the PLL will not achieve phase lock. The PLL

will be stable if the VCO frequency is within the specified VCO frequency range (400 to 900

MHz). The M-value must be programmed by the serial or parallel interface.

and can provide one of four division ratios (1, 2, 4, or 8). This divider extends performance

of the part while providing a 50% duty cycle. The output driver is driven differentially from

the output divider, and is capable of driving a pair of transmission lines terminated 50Ω to

supply for the core logic and output drivers to minimize noise induced jitter.

the values at the M[6:0] and N[1:0] inputs to configure the internal counters. It is recom-

mended on system reset to hold the P_LOAD input LOW until power becomes valid. On the

LOW-to-HIGH transition of P_LOAD, the parallel inputs are captured. The parallel interface

has priority over the serial interface. Internal pullup resistors are provided on the M[6:0] and

N[1:0] inputs prevent the LVCMOS compatible control inputs from floating. The serial inter-

face centers on a twelve bit shift register. The shift register shifts once per rising edge of the

S_CLOCK input. The serial input S_DATA must meet setup and hold timing as specified in

the AC Characteristics section of this document. The configuration latches will capture the

value of the shift register on the HIGH-to-LOW edge of the S_LOAD input. See

output reflects various internal node values, and is controlled by the T[2:0] bits in the serial data stream. In order to minimize the PLL jitter, it

is recommended to avoid active signal on the TEST output. The PWR_DOWN pin, when asserted, will synchronously divide the FOUT by 16.

The power down sequence is clocked by the PLL reference clock, thereby causing the frequency reduction to happen relatively slowly. Upon

de-assertion of the PWR_DOWN pin, the FOUT input will step back up to its programmed frequency in four discrete increments.

MPC92439 REVISION 4 OCTOBER 27, 2009

The MPC92439 is a 3.3 V compatible, PLL based clock synthesizer targeted for high

The internal crystal oscillator uses the external quartz crystal as the basis of its frequency

The feedback path of the PLL is internal. The PLL adjusts the VCO output frequency to

The PLL post-divider N is configured through either the serial or the parallel interfaces,

The configuration logic has two sections: serial and parallel. The parallel interface uses

3.125 MHz to 900 MHz synthesized clock output signal

Differential LVPECL output

LVCMOS compatible control inputs

On-chip crystal oscillator for reference frequency generation

Alternative LVCMOS compatible reference input

3.3V power supply

Fully integrated PLL

Minimal frequency overshoot

Serial 3-wire programming interface

Parallel programming interface for power-up

28-PLCC and 32-LQFP packaging

28-Lead and 32-lead Pb-free packages available

SiGe Technology

Ambient temperature range 0°C to + 70°C

Pin and function compatible to the MC12439 and MPC9239

– 2.0V. The positive supply voltage for the internal PLL is separated from the power

XTAL

900MHz, Low Voltage,

LVPECL Clock Syntheesizer

, the PLL feedback-divider M and the PLL post-divider N de-

PROGRAMMING INTERFACE

Notes:

(1) FN, FA suffix: leaded terminations

(2) EI, AC suffix: lead-free, RoHS-compliant, EPP

MPC92439EI

MPC92439FA

MPC92439AC

MPC92439KLF

P R O P O S E D

ORDERING INFORMATION

Device

900MHZ LOW VOLTAGE

32-LEAD VFQFN PACKAGE

CLOCK SYNTHESIZER

28-LEAD PLCC PACKAGE

32-LEAD LQFP PACKAGE

Pb-FREE PACKAGE

for more information. The TEST

CASE 873A-03

CASE 776-02

AC SUFFIX

FN SUFFIX

FA SUFFIX

EI SUFFIX

K SUFFIX

VFQFN-32 (Pb-Free)

PLCC-28 (Pb-Free)

LQFP-32 (Pb-Free)

MPC92439

(2)

DATA SHEET

(1)

(2)

Package

LQFP-32

Related parts for mpc92439

mpc92439 Summary of contents

Page 1

... Low Voltage, LVPECL Clock Syntheesizer The MPC92439 is a 3.3 V compatible, PLL based clock synthesizer targeted for high performance clock generation in mid-range to high-performance telecom, networking and computing applications. With output frequencies from 3.125 MHz to 900 MHz and the support of differential LVPECL output signals the device meets the needs of the most demanding clock applications ...

Page 2

... T-LATCH 1 BITS 0 GND 26 TEST MPC92439 29 GND FOUT 30 31 FOUT Figure 3. MPC92439 32-Lead Package Pinout (Top View) ©2009 Integrated Device Technology, Inc. FOUT FOUT TEST M[3] 14 M[2] 13 M[1] 12 M[0] 11 P_LOAD XTAL_OUT 7 8 ...

Page 3

... MPC92439 GND 29 30 FOUT 31 FOUT Figure 4. 32-Lead VFQFN Package Pinout (Top View) MPC92439 REVISION 4 OCTOBER 27, 2009 M[3] M[ M[0] 11 P_LOAD XTAL_OUT 900MHZ, LOW VOLTAGE, LVPECL CLOCK SYNTHESIZER ©2009 Integrated Device Technology, Inc. ...

Page 4

... MPC92439 REVISION 4 OCTOBER 27, 2009 Default Type 6 Analog Crystal oscillator interface 0 LVCMOS Alternative PLL reference input LVPECL Differential clock output LVCMOS Test and device diagnosis output 1 LVCMOS PLL reference select input 0 LVCMOS Configuration input for power down mode. Assertion (deassertion) of power down will decrease (increase) the output frequency by a ratio discrete steps ...

Page 5

... S 1. Absolute maximum continuous ratings are those maximum values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation at absolute-maximum-rated conditions is not implied. MPC92439 REVISION 4 OCTOBER 27, 2009 0 FREF_EXT (FOUT = L, FOUT = H) Output divider ÷ ...

Page 6

... The frequency of S_CLOCK is limited to 10 MHz in serial programming mode. S_CLOCK can be switched at higher frequencies when used as test clock in test mode 6. See 4. Maximum cycle jitter measured at the lowest VCO frequency. 5. Maximum period jitter measured at the lowest VCO frequency. MPC92439 REVISION 4 OCTOBER 27, 2009 = 3.3V ± 5 0°C to +70°C) CC ...

Page 7

... MPC92439 Data Sheet Table 8. MPC92439 Frequency Operating Range (in MHz) VCO frequency for an crystal interface frequency of M M[6: 0010100 21 0010101 22 0010110 23 0010111 24 0011000 25 0011001 26 0011010 27 0011011 28 0011100 29 0011101 30 0011110 31 0011111 32 0100000 33 0100001 34 0100010 35 0100011 36 0100100 37 0100101 38 0100110 39 0100111 40 0101000 400 41 0101001 410 ...

Page 8

... Figure 6 illustrate the RMS jitter performance of the MPC92439 across its specified VCO frequency range. The cycle-to- cycle and period jitter is a function of the VCO frequency and the output divider N. The general trend is that as the output frequency increases (higher VCO frequency and lower N-divider) the MPC92439 output jitter decreases ...

Page 9

... MPC92439 itself. However, the PLL bypass mode may be of interest at the board level for functional debug. When T[2:0] is set to 110 the MPC92439 is placed in PLL bypass mode. In this mode the S_CLOCK input is fed directly into the M and N dividers. The N divider drives the FOUT differential pair and the M counter drives the TEST output pin ...

Page 10

... The crystal, the trace and optional capacitors should be placed on the board as close as possible to the MPC92439 XTAL_IN and XTAL_OUT pins to reduce crosstalk of active signals into the oscillator. Short and wide traces further reduce parasitic inductance and resistance further recommended to guard the crystal circuit by placing a ground ring around the traces and oscillator components ...

Page 11

... MPC92439 will be a approximately 350-400 ppm higher than using crystals specified for parallel frequency mode. This is applicable to applications using the MPC92439 in sockets designed for the pin and function compatible MC12439 synthesizer, which has an oscillator using the crystal in its series resonance mode ...

Page 12

... MPC92439 Data Sheet Package Outline and Package Dimensions MPC92439 REVISION 4 OCTOBER 27, 2009 900MHZ, LOW VOLTAGE, LVPECL CLOCK SYNTHESIZER PACKAGE DIMENSIONS CASE 776-02 ISSUE D PLCC PLASTIC PACKAGE 12 ©2009 Integrated Device Technology, Inc. ...

Page 13

... MPC92439 Data Sheet D1/2 PIN 1 INDEX E1 D/2 4X 0. 28X SEATING PLANE (S) A1 DETAIL AD MPC92439 REVISION 4 OCTOBER 27, 2009 PACKAGE DIMENSIONS 4X 0. DETAIL G E 32X 0.1 C DETAIL AD PLATING METAL (θ1˚) 0. SECTION F ...

Page 14

... 0. 0.25 Ref. b 0.18 0.25 N & & E 5.00 Basic D2 & E2 3.0 e 0.50 Basic L 0.30 0.40 Reference Document: JEDEC Publication 95, MO-220 MPC92439 REVISION 4 OCTOBER 27, 2009 -1 ef Anvil Anvil Singula tion Sawn (Ref.) N & N Odd Bottom View w/Type B ID ...

Page 15

... MPC92439 Data Sheet 6024 Silver Creek Valley Road Sales 800-345-7015 (inside USA) San Jose, California 95138 +408-284-8200 (outside USA) Fax: 408-284-2775 www.IDT.com/go/contactIDT DISCLAIMER Integrated Device Technology, Inc. (IDT) and its subsidiaries reserve the right to modify the products and/or specifications described herein at any time and at IDT’s sole discretion. All information in this document, including descriptions of product features and performance, is subject to change without notice ...

Related keywords

mpc92439 datasheet
mpc92439 data sheet
mpc92439 pdf datasheet
mpc92439 component
mpc92439 part
mpc92439 distributor
mpc92439 RoHS
mpc92439 datasheet download