mpc92433 Integrated Device Technology, mpc92433 Datasheet
mpc92433
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mpc92433 Summary of contents
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... Frequency margining • Oscillator replacement The MPC92433 is a programmable high-frequency clock source (clock synthesizer). The internal PLL generates a high-frequency output signal based on a low-frequency reference signal. The frequency of the output signal is programmable and can be changed on the fly for frequency margining purposes. ...
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... Figure 2. 48-Lead Package Pinout (Top View ÷ ÷ GND recommended to use an external RC filter for the analog V CC_PLL pin. Please see the application section for details. MPC92433 REV. 3 NOVEMBER 10, 2008 QA QB LOCK supply ...
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... Negative power supply Positive power supply for the PLL (analog power supply recommended use an external RC filter for the analog power supply pin V V Positive power supply for I/O and core CC 3 Function 2 C slave address . CC_PLL MPC92433 REV. 3 NOVEMBER 10, 2008 ...
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... The device is reset. The output frequency is zero and the outputs are asynchronously forced to logic low state. After releasing reset (upon the rising edge of MR and independent on the state of PLOAD), the MPC92433 reads the parallel interface (M, NA, NB and P) to acquire a valid startup frequency configuration. See application/programming section. ...
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... 4.0 pF Inputs °C/W 69 Natural convection °C/W 64 200 ft/min °C/W 53 Natural convection °C/W 50 200 ft/min °C/W TBD TBD MIL-SPEC 883E Method 1012.1 Min Max Unit Condition –0.3 3.9 V –0 0 –0 0 ±20 mA ±50 mA °C –65 125 MPC92433 REV. 3 NOVEMBER 10, 2008 ...
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... — 0.3 V LVCMOS CC — 0.8 V LVCMOS — ±10 µA — — – — 0 — 0 — V – 0.74 V LVPECL CC — V – 1.60 V LVPECL CC 0.6 1.0 V — CC_PLL — 150 mA All V Pins CC MPC92433 REV. 3 NOVEMBER 10, 2008 or GND Pins ...
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... C 2 · 1.5 · · M ÷ P. The feedback divider M is VCO XTAL output frequency. A MPC92433 REV. 3 NOVEMBER 10, 2008 Condition = 400 Output period Qx = Output period Qx ...
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... Determine the PLL feedback divider The smallest possible output granularity in this example calculation is 500 kHz (set P = 4). M calculates to a value of 2000 ÷ 500. 4. Configure the MPC92433 with the obtained settings: 5. Use either parallel or serial interface to apply the setting. The 2 I See ...
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... VCO VCO SDA (configuration data) and SCL (configuration clock) signals. n/a n/a The MPC92433 acts as a slave device at the I information on I specification (version 2.1). PLOAD = 0 disables the I registers and any data written into the register is ignored. Howev- er, the MPC92433 is still visible at the I fers are acknowledged by the device. Read-access to the internal registers during PLOAD = 0 (parallel programming mode) is sup- ported ...
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... PLL (PLL feedback). Applying INC and DEC commands can result in a PLL configuration beyond the specified lock range and the PLL may lose lock. The MPC92433 does not verify the validity of any commands such as LOAD, INC, and DEC. The INC and DEC commands change the PLL feedback divider without updating PLL_L and PLL_H ...
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... Bit Value The 7-bit I combination of a 5-bit fixed addresses and two variable bits which are set by the hardware pins ADR[1:0]. Bit 0 of the MPC92433 slave address is used by the bus controller to select either the 2 C (if PLOAD = 0, the read or write mode. ’0’ indicates a transmission (I the MPC92433. ’ ...
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... Parallel Mode section for additional information on how to read a PLL startup configuration through the I Starting-Up Using the Parallel Interface The simplest way to use the MPC92433 is through the parallel interface. The serial interface pins (SDA, SDL) and ADDR[1:0]) can be left open and PLOAD is set to logic low. After the release ...
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... P_DIS Figure 5. Clock Stop Timing for (Disable) Figure 6. Clock Stop Timing for 5.The clock stop controls of the QA and QB outputs are Figure 6.) Concident rising edges of QA and QB stay (Enable) t P_EN = (Enable MPC92433 REV. 3 NOVEMBER 10, 2008 ...
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... MPC92433 1428MHZ DUAL OUTPUT LVPECL CLOCK SYNTHESIZER Frequency Operating Range Table 20. MPC92433 Frequency Operating Range for P=2 f [MHz] (parameter: f VCO M M[9:0] 15 170 0010101010 1360 180 0010110100 1440 190 0010111110 1425 1520 200 0011001000 1500 1600 210 0011010010 1575 1680 220 0011011100 1650 ...
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... MPC92433 1428MHZ DUAL OUTPUT LVPECL CLOCK SYNTHESIZER Table 21. MPC92433 Frequency Operating Range for P=4 f [MHz] (parameter: f VCO M M[9:0] 15 340 0101010100 1360 350 0101011110 1400 360 0101101000 1440 370 0101110010 1387.5 1480 380 0101111100 1425.0 1520 390 0110000110 1462.5 1560 400 0110010000 1500.0 ...
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... The crystal, the trace and optional capacitors should be placed on the board as close as possible to the MPC92433 XTAL_IN and XTAL_OUT pins to reduce crosstalk of active signals into the oscillator. Short and wide traces further reduce parasitic inductance and resistance ...
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... DC termination – Figure 10 illustrates the AC test reference for TT CC the MPC92433 as used in characterization and test of this circuit separate termination voltage (V TT applications may use alternative output termination methods such as shown in Figure 11 and Figure 12 ...
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... SMD Resistor Network Figure 12. Resistor Network Termination IDT™ / ICS™ DUAL LVPECL CLOCK SYNTHESIZER Ω 50 Ω 50 Ω 46.4 Ω Ω Ω Ω MPC92433 V TT Figure 13. Interfacing with LVCMOS Logic for f < 300 MHz MPC92433 REV. 3 NOVEMBER 10, 2008 MC100ES60T23 ...
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... G 0.500 BSC H 0.050 0.150 J 0.090 0.200 K 0.500 0.700 L 0˚ 7˚ M 12˚ REF N 0.090 0.160 P 0.250 BSC R 0.150 0.250 S 9.000 BSC S1 4.500 BSC V 9.000 BSC V1 4.500 BSC W 0.200 REF AA 1.000 REF R W L˚ MPC92433 REV. 3 NOVEMBER 10, 2008 ...
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... MPC92433 1428MHZ DUAL OUTPUT LVPECL CLOCK SYNTHESIZER Contact Information: www.IDT.com Sales 800-345-7015 (inside USA) +408-284-8200 (outside USA) Fax: 408-284-2775 www.IDT.com/go/contactIDT © 2008 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT and the IDT logo are trademarks of Integrated Device Technology, Inc ...