sy89838u Micrel Semiconductor, sy89838u Datasheet

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sy89838u

Manufacturer Part Number
sy89838u
Description
Precision 1 8 Lvds Clock Fanout Buffer With 2 1 Runt Pulse Eliminator Input Mux
Manufacturer
Micrel Semiconductor
Datasheet

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General Description
The SY89838U is a low jitter, low skew, high-speed
1:8 fanout buffer with a unique, 2:1 differential input
multiplexer (MUX) optimized for redundant source
switchover
multiplexers, the SY89838U unique 2:1 Runt Pulse
Eliminator (RPE) MUX prevents any short cycles or
“runt” pulses during switchover. In addition, a unique
fail-safe
conditions when the selected input clock fails to a
DC voltage (voltage between the pins of the
differential
SY89838U distributes clock frequencies from 1kHz
to 1.5GHz, guaranteed, over temperature and
voltage.
The differential input includes Micrel’s unique, 3-pin
input termination architecture that allows customers
to interface to any differential signal (AC- or DC-
coupled) as small as 100mV (200Mv
level shifting or termination resistor networks in the
signal path. The outputs are 350mV compatible
LVDS with fast rise/fall times guaranteed to be less
than 150ps.
The SY89838U operates from a 2.5V ±5% supply
and
temperature
applications that require 800mV LVPECL outputs,
consider the SY89837U. The SY89838U is part of
Micrel’s high-speed, Precision Edge
All support documentation can be found on Micrel’s
web site at: www.micrel.com.
November 2007
Precision Edge is a registered trademark of Micrel, Inc
MicroLeadFrame and MLF are registered trademarks of Amkor Technology, Inc.
is
input
guaranteed
input
range
applications.
protection
drops
of
over
–40°C
below
prevents
the
Unlike
to
®
100mV).
PP
product line.
full
) without any
+85°C.
metastable
industrial
standard
The
For
with 2:1 Runt Pulse Eliminator Input MUX
Precision 1:8 LVDS Clock Fanout Buffer
Features
• Selects between two clocks, and provides 8
• 2:1 MUX input provides a glitch-free, stable LVDS
• Guaranteed AC performance over temperature
• Unique patent-pending input isolation design
• Fail-safe input prevents oscillation
• Ultra-low jitter design:
• Unique patent-pending input termination and VT
• 350mV LVDS output swing
• Power supply 2.5V +5%
• –40°C to +85°C industrial temperature range
• Available in 32-pin (5mm x 5mm) MLF
Applications
• Redundant clock switchover
• Failsafe clock protection
Markets
• LAN/WAN
• Enterprise Servers
• ATE
• Test and Measurements
precision, low skew LVDS output copies
output
and supply voltage:
– Wide operating frequency: 1kHz to >1.5GHz
– <150ps t
– <40ps output-to-output skew
minimizes crosstalk
– <1ps
– <1ps
– <10ps
– <0.7ps
pin accepts DC- and AC-coupled inputs (CML,
PECL, LVDS)
RMS
RMS
PP
RMS
cycle-to-cycle jitter
r
random jitter
total jitter (clock)
SY89838U
/t
f
MUX crosstalk induced jitter
hbwhelp@micrel.com
M9999-112907-C
Precision Edge
or (408) 955-1690
®
package
®

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sy89838u Summary of contents

Page 1

... General Description The SY89838U is a low jitter, low skew, high-speed 1:8 fanout buffer with a unique, 2:1 differential input multiplexer (MUX) optimized for redundant source switchover applications. multiplexers, the SY89838U unique 2:1 Runt Pulse Eliminator (RPE) MUX prevents any short cycles or “runt” pulses during switchover. In addition, a unique ...

Page 2

Typical Application November 2007 2 hbwhelp@micrel.com M9999-112907-C or (408) 955-1690 ...

Page 3

... November 2007 Package Operating Type Range MLF-32 Industrial MLF-32 Industrial = +25°C, DC Electrical only. A ® 32-Pin MLF (MLF-32) 3 Package Marking Lead Finish SY89838U with bar line NiPdAu Pb-Free indicator Pb-Free SY89838U with bar line NiPdAu Pb-Free indicator Pb-Free M9999-112907-C hbwhelp@micrel.com or (408) 955-1690 ...

Page 4

Pin Description Pin Number Pin Name 1, 3, IN0, /IN0 IN1, /IN1 2, 7 VT0, VT1 31 SEL 9, 19, 22, 32 VCC 30, 28, 26, 24, 18, 16, 14, 12, Q0 – Q7, 29, 27, 25, 23, ...

Page 5

Absolute Maximum Ratings Supply Voltage (V ) ...........................-0.5V to +4.0V CC Input Voltage (V ) .................................. -0. Input Current Source or sink current on IN, /IN.............. ±50mA Termination Current Source or sink current ...

Page 6

LVDS Outputs DC Electrical Characteristics V = +2.5V ±5 –40° 85° Symbol Parameter V Output Voltage Swing OUT (Q, /Q) V Differential Output Voltage Swing DIFF-OUT |Q - /Q| V Output Common Mode ...

Page 7

AC Electrical Characteristics V = +2.5V ±5 –40°C to +85°C, RPE enabled, Input Symbol Parameter f Maximum Operating Frequency MAX t Differential Propagation Delay pd IN-to-Q SEL-to-Q SEL-to-Q t Differential Propagation Delay pd Tempco Temperature ...

Page 8

... Functional Description RPE MUX and Fail-Safe Input The SY89838U is optimized for clock switchover applications where switching from one clock to another clock without runt pulses (short cycles) is required. It features two unique circuits: Runt-Pulse Eliminator (RPE) Circuit: The RPE MUX provides a “glitchless” switchover between two clocks and prevents any runt pulses from occurring during the switchover transition ...

Page 9

Case #2 Input Clock Failure: Switching from a selected clock stuck HIGH to a valid clock (RPE enabled) If CLK1 fails HIGH before the RPE MUX selects CLK2 (using the SEL pin), the switchover will occur in three stages. CLK1 ...

Page 10

... SEL Select CLK 1 OUTPUT as in case # case #3 Power-On Reset (POR) Description The SY89838U includes an internal power-on reset (POR) function to ensure the RPE logic starts- known logic state once the power-supply voltage is stable. An external capacitor connected between V and the CAP pin (pin 10) controls the delay for CC the power-on reset function ...

Page 11

Typical Operating Characteristics V = 2.5V, GND = 0V, V ≥ 250mV CC IN Propagation Delay Variation vs. Input Rise/Fall Time 1000 900 t (max) pd 800 700 600 500 400 300 200 V IN 100 0 0 100 200 ...

Page 12

Singled-Ended and Differential Swings Figure 1a. Singled-Ended Voltage Swing Input Stage November 2007 OUT 350 mV (typical) Figure1b. Differential Voltage Swing Figure 2. Simplified Differential Input Stage DIFF_IN DIFF_OUT 700 mV (typical) ...

Page 13

Input Interface Applications Figure 3a. LVPECL Interface (DC-Coupled) Figure 3d. CML Interface (AC-Coupled) November 2007 Figure 3b. LVPECL Interface (AC-coupled) Figure 3e. LVDS Interface (DC-Coupled) 13 option: may connect Figure 3c. CML Interface (DC-Coupled) M9999-112907-C ...

Page 14

LVDS Output Interface Applications LVDS specifies a small swing of 325mV typical nominal 1.2V common mode above ground. The common mode voltage has tight limits to permit large variations in ground between an LVDS driver and V V ...

Page 15

Package Information November 2007 ® 32-Pin (5mm x 5mm) MLF (MLF-32) 15 M9999-112907-C hbwhelp@micrel.com or (408) 955-1690 ...

Page 16

PCB Thermal Consideration for 32-Pin MLF (Always solder, or equivalent, the exposed pad to the PCB) Package Notes: 1. Package meets Level 2 qualification. 2. All parts are dry-packaged before shipment. 3. Exposed pads must be soldered to a ground ...

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