lmx2502lq1635 National Semiconductor Corporation, lmx2502lq1635 Datasheet

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lmx2502lq1635

Manufacturer Part Number
lmx2502lq1635
Description
Pllatinum? Frequency Synthesizer System With Integrated Vco
Manufacturer
National Semiconductor Corporation
Datasheet

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LMX2502LQ1635
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© 2003 National Semiconductor Corporation
LMX2502/LMX2512
PLLatinum
Integrated VCO
General Description
LMX2502 and LMX2512 are highly integrated, high perfor-
mance, low power frequency synthesizer systems optimized
for Korean PCS and Korean Cellular CDMA (1xRTT, IS-95)
mobile handsets. Using a proprietary digital phase locked
loop technique, LMX2502 and LMX2512 generate very
stable, low noise local oscillator signals for up and down
conversion in wireless communications devices.
LMX2502 and LMX2512 include a voltage controlled oscil-
lator (VCO), a loop filter, and a fractional-N RF PLL based on
a delta sigma modulator. In concert these blocks form a
closed loop RF synthesizer system. LMX2502 supports the
Korean PCS band and LMX2512 supports the Korean Cel-
lular band.
LMX2502 and LMX2512 include an Integer-N IF PLL also.
For more flexible loop filter designs, the IF PLL includes a
4-level programmable charge pump. Together with an exter-
nal VCO and loop filter, LMX2502 and LMX2512 make a
complete closed loop IF synthesizer system.
Serial data is transferred to the device via a three-wire
MICROWIRE interface (DATA, LE, CLK).
Operating supply voltage ranges from 2.7 V to 3.3 V.
LMX2502 and LMX2512 feature low current consumption:
17 mA at 2.8 V.
LMX2502 and LMX2512 are available in a 28-pin leadless
leadframe package (LLP).
Functional Block Diagram
PLLatinum
is a trademark of National Semiconductor Corporation.
Frequency Synthesizer System with
DS200680
Features
n Small Size
n RF Synthesizer System
n IF Synthesizer System
n Supports Various Reference Frequencies
n Fast Lock Time: 500 µs
n Low Current Consumption
n 2.7 V to 3.3 V Operation
n Digital Filtered Lock Detect Output
n Hardware and Software Power Down Control
Applications
n Korean PCS CDMA Systems
n Korean Cellular CDMA Systems
5.0 mm X 5.0 mm X 0.75 mm 28-Pin LLP Package
Integrated RF VCO
Integrated Loop Filter
Low Spurious, Low Phase Noise Fractional-N RF PLL
Based on 11-Bit Delta Sigma Modulator
10 kHz Frequency Resolution
Integer-N IF PLL
Programmable Charge Pump Current Levels
Programmable Frequency
19.20/19.68 MHz
17 mA at 2.8 V
20068001
www.national.com
June 2003

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lmx2502lq1635 Summary of contents

Page 1

... V. LMX2502 and LMX2512 are available in a 28-pin leadless leadframe package (LLP). Functional Block Diagram PLLatinum ™ trademark of National Semiconductor Corporation. © 2003 National Semiconductor Corporation Features n Small Size 5 5 0.75 mm 28-Pin LLP Package n RF Synthesizer System Integrated RF VCO ...

Page 2

Connection Diagram NOTE: Analog ground connected through exposed die attached pad. Pin Descriptions Pin Number ...

Page 3

... Ordering Information Part Number RF Min. (MHz) LMX2502LQX1635 1619.62 LMX2502LQ1635 1619.62 LMX2512LQX0967 954.42 LMX2512LQ0967 954.42 LMX2512LQX1065 1052.64 LMX2512LQ1065 1052.64 Part Number Description RF Max. RF Center IF (MHz) (MHz) (MHz) ~ 1635 1649.62 440.76 ~ 1635 1649.62 440.76 ~ 967 979.35 170.76 ~ 967 979.35 170.76 ~ 1065 1077.57 367.20 ~ 1065 1077 ...

Page 4

... LMX2512LQ0967 LMX2512LQ1065 P RF Output Power RFout Lock Time LMX2502LQ1635 (Note 7) LMX2512LQ0967 LMX2512LQ1065 Reference Spurs RMS Phase Error L(f) Phase Noise LMX2502LQ1635 RFout LMX2512LQ0967 LMX2512LQ1065 2nd Harmonic Suppression 3rd Harmonic Suppression www.national.com Recommended Operating (Notes 1, Conditions Parameter Ambient Temperature Supply Voltage (to GND) V Units ...

Page 5

... Electrical Characteristics Symbol Parameter IF PLL f Operating Frequency LMX2502LQ1635 Fin (Note 8) LMX2512LQ0967 LMX2512LQ1065 P IF Input Sensitivity Fin f Phase Detector Frequency ΦIF I Charge Pump Current CPout DIGITAL INTERFACE (DATA, CLK, LE, LD, CE) V High-Level Input Voltage IH V Low-Level Input Voltage IL I High-Level Input Current ...

Page 6

Microwire Interface Timing Diagram www.national.com 6 20068004 ...

Page 7

... IF_R: Preset divide ratio of the binary 9-bit programmable reference counter (2 ≤ IF_R ≤ 511) From the above equation, the LMX2502/12 generates the fixed IF frequencies as summarized in Table 1. Device Type LMX2502LQ1635 LMX2512LQ0967 LMX2512LQ1065 VCO FREQUENCY TUNING The center frequency of the RF VCO is determined by the resonant frequency of the tank circuit ...

Page 8

Functional Description TABLE 2. Power Down Configuration CE Pin RF_EN IF_EN RF Circuitry OFF OFF OFF Don’t care. LOCK DETECT The ...

Page 9

Functional Description MICROWIRE INTERFACE The programmable register set is accessed via the MICROWIRE serial interface. The interface comprises three signal pins: CLK, DATA, and LE (Latch Enable). Serial data (DATA) is clocked into the 24-bit shift register on the rising ...

Page 10

Programming Description GENERAL PROGRAMMING INFORMATION The serial interface has a 24-bit shift register to store the incoming data bits temporarily. The incoming data is loaded into the shift register from MSB to LSB. The data is shifted at the rising ...

Page 11

Programming Description R0 REGISTER The R0 register address bits (R0 [1:0]) are “00”. The SPI_DEF bit selects between using the default IF counter values and user programmable values. The use of the default counter values requires that only words R0 ...

Page 12

Programming Description RF N Counter Setting: Counter Name Modulus Counter Programmable Counter Swallow Counter Pulse Swallow Function {Prescaler x RF_B + RF_A + (RF_FN / f VCO where f : Output frequency of voltage controlled oscillator (VCO) VCO ...

Page 13

... SPUR_ 0 RDT [1:0] Functions IF Frequency Selection 00 = 170.76 MHz (LMX2512LQ0967 367.20 MHz (LMX2512LQ1065 440.76 MHz (LMX2502LQ1635) Reference Frequency Selection 0 = 19.20 MHz 1 = 19.68 MHz Spur Reduction Scheme spur reduction 01 = Not Used 10 = Continuous tracking of variation (Recommended One time optimization RF Output Power Control 00 = Minimum Output Power ...

Page 14

Programming Description R2 REGISTER The R2 Register address bits (R2 [1:0]) are “10”. The IF_CUR [1:0] bits program the IF charge-pump current. Considering the external IF VCO and loop filter, the user can select the amount of IF charge pump ...

Page 15

Programming Description R3 REGISTER The R3 register address bits (R3 [2:0]) are “011”. Register R3 contains the controls for the phase lock bandwidth controls (BW_DUR, BW_CRL, and BW_EN). The duration of the digital controller portion of the bandwidth control is ...

Page 16

Programming Description R4 REGISTER The R4 register address bits (R3 [3:0]) are “0111”. Register R4 is used to set the IF N counters if the default value is not desired. This register is only active if the SPI_DEF bit in ...

Page 17

Programming Description R5 REGISTER The R5 register address bits (R5 [4:0]) are “01111”. Register R5 is used to set the IF_R divider if the default value is not desired. This register is only active if the SPI_DEF bit in register ...

Page 18

... NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant ...

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