lmh2190 National Semiconductor Corporation, lmh2190 Datasheet
lmh2190
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lmh2190 Summary of contents
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... It has very low phase noise which enables it to drive sensitive modules such as Wireless LAN and Bluetooth. The LMH2190 can be clocked MHz, and has an in- dependent clock request pin for each clock output which allows the peripheral to control the clock. It features an inte- ...
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Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage BAT SS LVCMOS port IO voltage Current on CLKx pins ESD Tolerance (Note 2) ...
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Symbol Parameter Jitter Additive RMS period Jitter RMS Phase CLK1 Additive Phase Noise with Noise all Outputs toggling CLK2 Additive Phase Noise with all Outputs toggling CLK3 Additive Phase Noise with all Outputs toggling CLK4 Additive Phase Noise with all ...
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Symbol Parameter Clock Request Output (SCLK_REQ) tp Propagation Delay, Push-Pull LH and Open Source, Figure (Note 7) tp Propagation Delay, Push-Pull HL and Open Drain, Figure 2, (Note 7) V SCLK_REQ Output Voltage High OH Level V SCLK_REQ Output Voltage ...
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Symbol Parameter PSRR Power Supply Rejection Ratio E Output Noise Voltage N T Thermal Shutdown SHTDWN ΔV Line Transient (Note 7) OUT Load Transient (Note 7) Overshoot on Startup (Note R DC Output Resistance OUT T Turn on Time (Note ...
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Timing Waveforms FIGURE 3. Rise / Fall Time and Duty Cycle Waveform for Clock Outputs www.national.com FIGURE 1. Clock Output Timing Waveforms FIGURE 2. Clock Request Timing Waveforms 30083808 FIGURE 4. Setup Time from SCLK_IN to CLK_REQ 6 30083805 30083806 ...
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... A1 V Battery / BAT Input B1 V LDO / Output OUT B2 V Ground Input Output, I/O = Input / Output 16–Bump micro SMD Marking AA = LMH2190TM-38 30083803 Type Description I Source Clock Input O Source Clock Request O Clock Output 1 I Clock Request Input 1 O Clock Output 2 I Clock Request Input 2 ...
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... LMH2190TM-38 16-Bump Thin microSMD LMH2190TMX-38 Note: For other addresses please contact your local sales office. Block Diagram www.national.com Package Address Marking 250 Units Tape and Reel 38 AA 3000 Units Tape and Reel LMH2190 8 Transport Media NSC Drawing TMD16AAA 30083804 ...
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Typical Performance Characteristics 26 MHz 2.2 µ 1.8V (See OUT DD_IO Supply Current vs. Supply Voltage Supply Current vs. Capacitive Load LDO Output Voltage vs. LDO Output Current Unless otherwise specified, T Block Diagram), Registers are ...
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Additive Phase Noise vs. Frequency Offset CLK1 Response, C CLK1 Response, C www.national.com 30083830 = 22pF L 30083835 = 50 pF Power Supply Rejection Ratio vs. Frequency L 30083837 10 CLK1 Response 30083834 CLK1 Response, ...
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... The LMH2190 though has excellent phase noise specifications in order to minimize degradation of the clock quality. A typical LMH2190 application is depicted in Figure 5. The LMH2190 clock tree driver can be divided into 4 blocks: • Clock tree driver The clock tree driver provides a clean clock to a maximum of 4 separately connected peripheral devices. ...
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... TCXO connected to the LMH2190. Knowing the TCXO phase noise and the additive phase noise of the LMH2190, the total phase noise to the peripheral can be calculated: Where the total phase noise at the output of the LMH2190, PN_TCXO is the TCXO’ ...
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... Clock Request Inputs A clock request input is provided for each clock output 8). This allows the peripheral device to control the LMH2190 when it wants to receive a clock. In case the peripheral device does not have clock request functionality, the CLKx_REQ can System Clock Request Output ...
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... TCXO, while the SCLK_REQ enables or disables the TCXO. If the TXCO doesn't have an enable pin, power savings can be realized by switching off the LMH2190's LDO and therewith the TCXO. FIGURE 10. TCXO Powered from LMH2190's LDO Note that the LMH2190 initializes to its default settings when V is powered-up ...
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... CONTROL LOGIC The LMH2190 can be controlled address of the LMH2190 is 38h. It can configure the reg- isters inside the LMH2190 to change the default configura- tion. The communication is based on a READ/WRITE structure, following the transmission protocol ...
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The receiver must pull down the SDA line during the 9th clock pulse, signifying an acknowledge. A re- ceiver which has been addressed must generate an acknowl- edge after each byte has been received. After the START ...
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... Hold Time (repeated) START Condition 2 Clock Low Time 3 Clock High Time 4 Setup Time for a Repeated START Condition 5 Data Hold Time (Output direction, delay generated by LMH2190) 5 Data Hold Time (Input direction, delay generated by the Master) 6 Data Setup Time 7 Rise Time of SDA and SCL 8 ...
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Registers Address = 00H, type = R/W, reset value = 44H, 0100_0100, Bold face settings are the default configuration. Field Output Mode Clock Request Output Type Clock Request Output Polarity Clock Request Output Mode Clock Input Type ...
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Address = 02H, type = R/W, reset value = 06H, 0000_0110, Bold face settings are the default configuration. Field Bits CLK2 Load [1-0] CLK_REQ2 Input Polarity CLK_REQ2 Force ON Control CLK_REQ2 Force OFF Control CLK_REQ2 Pull down Resistor Reserved Reserved ...
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Address = 04H, type = R/W, reset value = 06H, 0000_0110, Bold face settings are the default configuration. Field CLK4 Load CLK_REQ4 Input Polarity CLK_REQ4 Force ON Control CLK_REQ4 Force OFF Control CLK_REQ4 Pull down Resistor Reserved Reserved Address = ...
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LAYOUT RECOMMENDATIONS As with any other device, careful attention must be paid to the board layout. If the board isn't properly designed, the perfor- mance of the device can be less than might be expected. Especially the input clock trace ...
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Physical Dimensions X1 = 1.615 ± 0.030 mm 1.615 ± 0.030 mm 0.600 ± 0.075 mm www.national.com inches (millimeters) unless otherwise noted 16-Bump micro SMD NS Package Number TMD16AAA 22 ...
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Notes 23 www.national.com ...
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