mk3805 Integrated Device Technology, mk3805 Datasheet - Page 3

• Manufacturer Part Number: mk3805
• Description: Buffer/clock Driver
• Manufacturer: Integrated Device Technology

External Components
The MK3805 requires a minimum number of external
components for proper operation.
Decoupling Capacitors
Decoupling capacitors of 0.01µF must be connected
between VDD and GND, as close to these pins as possible.
For optimum device performance, the decoupling capacitors
should be mounted on the component side of the PCB.
Avoid the use of vias in the decoupling circuit.
Series Termination Resistor
When the PCB trace between the clock outputs and the
loads are over 1 inch, series termination should be used. To
series terminate a 50Ω trace (a commonly used trace
impedance) place a 33Ω resistor in series with the clock
line, as close to the clock output pin as possible. The
nominal impedance of the clock output is 20Ω.
Absolute Maximum Ratings
IDT™ / ICS™ BUFFER/CLOCK DRIVER
MK3805
BUFFER/CLOCK DRIVER
Stresses above the ratings listed below can cause permanent damage to the MK3805. These ratings, which are
standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at
these or any other conditions above those indicated in the operational sections of the specifications is not implied.
Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical
parameters are guaranteed only over the recommended operating temperature range.
Supply Voltage, VDD
All Inputs and Outputs
Ambient Operating Temperature
Storage Temperature
Junction Temperature
Soldering Temperature
Item
3
PCB Layout Recommendations
For optimum device performance and lowest output phase
noise, the following guidelines should be observed.
1) The 0.01µF decoupling capacitors should be mounted on
the component side of the board as close to the VDD pins
as possible. No vias should be used between the
decoupling capacitors and VDD pins. The PCB trace to VDD
pin should be kept as short as possible, as should the PCB
trace to the ground via.
2) To minimize EMI, the 33Ω series termination resistor (if
needed) should be placed close to the clock output.
3) An optimum layout is one with all components on the
same side of the board, minimizing vias through the signal
layers. Other signal traces should be routed away from the
MK3805. This includes signal traces just underneath the
device, or on layers adjacent to the ground plane layer used
by the device.
7 V
-0.5 V to VDD+0.5 V
-40 to +85°C
-65 to +150°C
125°C
260°C
Rating
MK3805
FAN OUT BUFFER
REV C 092105